A solid state imaging device with (a) an amplifier transistor; an input node for the amplifier transistor; or both the amplifier transistor and the input node for the amplifier transistor; (b) a plurality of photoelectric conversion elements; (c) a like plurality of storage transistors, each configured to act as a photo-charge storage node to store charges generated by a respective photoelectric conversion element; and (d) a like plurality of transfer transistors, each configured to transfer charges from a respective photoelectric conversion element to a common output, the common output being either the amplifier transistor or the input node for the amplifier transistor.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A solid state imaging device comprising: an amplifier transistor, an input node for the amplifier transistor, or both the amplifier transistor and the input node for the amplifier transistor; a plurality of photoelectric conversion elements; a same plurality of storage transistors, each configured to act as a photo-charge storage node to store charges generated by a respective photoelectric conversion element; and a same plurality of transfer transistors, each configured to transfer charges from a respective photoelectric conversion element to a common output, the common output being either the amplifier transistor or the input node for the amplifier transistor.
2. The solid state imaging device of claim 1 , wherein each storage transistor is electrically between its respective photoelectric conversion element and its respective transfer transistor.
3. The solid state imaging device of claim 2 , wherein each photoelectric conversion element is a pinned photodiode.
4. The solid state imaging device of claim 1 , wherein a gate electrode of each transfer transistor has a fixed potential.
5. The solid state imaging device of claim 1 , wherein: each storage transistor is comprised of a first and a second transistor, and the first and second transistors have gate electrodes that are simultaneously collectively driven, and a threshold voltage of the first transistor is set to be higher than that of the second transistor.
6. The solid-state imaging device of claim 1 , wherein the input node for the amplifier transistor is a floating diffusion region.
7. The solid-state imaging device of claim 1 , wherein: the solid-state imaging device comprises both the amplifier transistor and the input node for the amplifier transistor, each storage transistor is electrically between its respective photoelectric conversion element and its respective transfer transistor, the input node for the amplifier transistor is a floating diffusion region, each transfer transistor is connected to transfer charges from its respective storage transistor to the floating diffusion region, and a gate of the amplifier transistor is connected to the floating diffusion region.
8. An electronic device comprising: a solid-state imaging circuitry, the solid-state imaging device comprising (a) an amplifier transistor, an input node for the amplifier transistor, or both the amplifier transistor and the input node for the amplifier transistor, (b) a plurality of photoelectric conversion elements, (c) a same plurality of storage transistors, each configured to act as a photo-charge storage node to store charges generated by a respective photoelectric conversion element, and (d) a same plurality of transfer transistors, each configured to transfer charges from a respective photoelectric conversion element to a common output, the common output being either the amplifier transistor or the input node for the amplifier transistor; and processing circuitry to process signals generated by the solid-state image circuitry.
9. The electronic device of claim 8 , wherein each storage transistor is electrically between its respective photoelectric conversion element and its respective transfer transistor.
10. The electronic device of claim 9 , wherein each photoelectric conversion element is a pinned photodiode.
11. The electronic device of claim 8 , wherein a gate electrode of each transfer transistor has a fixed potential.
12. The electronic device of claim 8 , wherein: each storage transistor is comprised of a first and a second transistor, and the first and second transistors have gate electrodes that are simultaneously collectively driven, and a threshold voltage of the first transistor is set to be higher than that of the second transistor.
13. The electronic device of claim 8 , wherein the input node for the amplifier transistor is a floating diffusion region.
14. The electronic device of claim 8 , wherein: the solid-state imaging circuitry comprises both the amplifier transistor and the input node for the amplifier transistor, each storage transistor is electrically between its respective photoelectric conversion element and its respective transfer transistor, the input node for the amplifier transistor is a floating diffusion region, each transfer transistor is connected to transfer charges from its respective storage transistor to the floating diffusion region, and a gate of the amplifier transistor is connected to the floating diffusion region.
15. A solid-state imaging device comprising: a floating diffusion region; a reset transistor operatively coupled to the floating diffusion region to effect a reset thereof; a plurality of photoelectric conversion elements; a same plurality of storage transistors, each configured to act as a photo-charge storage node to store charges generated by a respective photoelectric conversion element; and a same plurality of transfer transistors, each configured to transfer charges from a respective photoelectric conversion element to floating diffusion region.
16. The solid state imaging device of claim 15 , wherein each photoelectric conversion element is a pinned photodiode.
17. A solid-state imaging device comprising: a floating diffusion region; a reset transistor operatively coupled to the floating diffusion region to effect a reset thereof; an amplifier transistor with a gate coupled to the floating diffusion region; a plurality of photoelectric conversion elements; a same plurality of storage transistors, each configured to act as a photo-charge storage node to store charges generated by a respective photoelectric conversion element; and a same plurality of transfer transistors, each configured to transfer charges from a respective photoelectric conversion element to the floating diffusion region.
18. The solid state imaging device of claim 17 , wherein each photoelectric conversion element is a pinned photodiode.
19. A solid-state imaging device comprising: a floating diffusion region; a reset transistor operatively coupled to the floating diffusion region to effect a reset thereof; an amplifier transistor with a gate coupled to the floating diffusion region; a plurality of photoelectric conversion elements; a same plurality of storage transistors, each operatively connected and configured to receive charges generated by is respective photoelectric conversion element and to act as a photo-charge storage node to store the charges generated by a respective photoelectric conversion element; and a same plurality of transfer transistors, each operatively connected and configured to transfer charges from a respective storage transistor to the floating diffusion region.
20. The solid state imaging device of claim 19 , wherein each photoelectric conversion element is a pinned photodiode.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
October 31, 2013
February 23, 2016
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