A liquid crystal display includes a plurality of pixels arranged in a matrix, each pixel having a first sub-pixel electrode and a second sub-pixel electrode. A first thin film transistor is connected to the first sub-pixel electrode. A second thin film transistor is connected to the second sub-pixel electrode. A third thin film transistor is connected to the second sub-pixel electrode. A fourth thin film transistor is connected to a drain electrode of the third thin film transistor. A first gate line is connected to the first thin film transistor and the second thin film transistor. A data line is connected to the first thin film transistor and the second thin film transistor. A second gate line is connected to the third thin film transistor. A third gate line is connected to the fourth thin film transistor.
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September 23, 2011
March 22, 2016
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