3D package with through substrate vias

1. A package, comprising: a substrate having electrical devices disposed at a first side of the substrate; vias extending from the first side of the substrate to a second side of the substrate opposite the first side; metallization layers disposed on the first side of the substrate; contact pads disposed over the first metallization layers; a protection layer disposed over the contact pads; post-passivation interconnects (PPIs) disposed over the protection layer and extending to the contact pads through openings in the protection layer; first connectors disposed on the PPIs; and a molding compound over the PPIs and around the connectors.

2. The package of claim 1 , further comprising: an insulating layer disposed over the metallization layers; wherein the contact pads are disposed directly on the insulating layer and have portions extending through openings in the insulating layer and contacting conductive elements in the metallization layers.

3. The package of claim 1 , wherein the insulating layer is directly on the metallization layers; and wherein the PPIs are disposed directly on the protection layer.

4. The package of claim 1 , wherein the vias comprises a liner layer insulating conductive material of the vias from the substrate.

5. The package of claim 1 , wherein the first connectors are disposed directly on the PPIs.

6. The package of claim 4 , wherein the PPIs extend laterally from the contact pads; and wherein the first connectors are laterally spaced apart from the contact pads.

7. The package of claim 1 , further comprising: A redistribution layer (RDL) disposed on the second side of the substrate, conductive elements of the RDL contacting the vias.

8. The package of claim 7 , further comprising second connectors on the RDL, wherein the second connectors are electrically connected to a second package.

9. A package, comprising: a substrate having vias disposed therein and extending from a circuit side to a back side of the substrate; an interlayer dielectric (ILD) disposed on the circuit side of the substrate, the ILD having contact plugs that extend through the ILD and are in electrical contact with the vias; metallization layers disposed over the ILD, the metallization layers having first conductive elements disposed in one or more intermetal dielectric layers, wherein the first conductive elements are in electrical contact with the contact plugs; an insulating layer disposed on the metallization layers, the insulating layer having openings exposing the first conductive elements; contact pads disposed over the insulating layer and in electrical contact with the first conductive elements; interconnects disposed over the contact pads, each of the interconnects in electrical contact with a respective one of the contact pads and extending laterally from the respective one of the contact pads; connectors disposed on the interconnects; and a molding compound disposed around the connectors and covering portions of the interconnects; wherein the connectors extend past a surface of the molding compound.

10. The package of claim 9 , wherein the contact pads are disposed directly on the insulating layer; and wherein the contact pads have portions extending through openings in the insulating layer and contacting the first conductive elements in the metallization layers.

11. The package of claim 9 , wherein the vias comprises a liner layer insulating conductive material of the vias from the substrate.

12. The package of claim 9 , wherein the connectors are disposed directly on the interconnects.

13. The package of claim 9 , wherein the connectors are laterally spaced apart from the contact pads.

14. The package of claim 9 , further comprising: second conductive elements disposed on the back side of the substrate and contacting the vias; and second connectors disposed on the back side of the substrate and electrically connected to the second conductive elements.

15. The package of claim 9 , further comprising: second conductive elements disposed on the back side of the substrate and contacting the vias; and a die disposed on the back side of the substrate and wire bonded to the second conductive elements on the back side of the substrate.

16. The package of claim 9 , further comprising: a protection layer disposed on the insulating layer and extending over the contact pads; wherein the interconnects are disposed directly on the protection layer.

17. A method, comprising: providing a substrate having electrical devices on a circuit side of the substrate, the substrate having vias extending through the substrate; forming metallization layers over the circuit side of the substrate, the metallization layers having conductive features disposed therein and electrically connected to the electrical devices and to the vias; forming contact pads on the metallization layers; forming interconnects on the contact pads, the interconnects extending laterally from the contact pads; forming connectors on the interconnects; and forming a molding compound layer over portions of the interconnects and around lower portions of the connectors.

18. The method of claim 17 , further comprising: forming vias extending partially through the substrate; and thinning a back side of the substrate opposite the circuit side after forming the molding compound layer, the thinning exposing ends of the vias.

19. The method of claim 18 , wherein the connectors are formed directly on the interconnects.

20. The method of claim 17 , further comprising forming a protection layer on the RDL; wherein the interconnects are formed directly on the protection layer and extend through openings in the protection layer to contact the contact pads.