Patentable/Patents/US-9305908
US-9305908

Methods for performing extended wafer-level packaging (eWLP) and eWLP devices made by the methods

PublishedApril 5, 2016
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

Methods are provided for making embedded Wafer-Level Packaging (eWLP) devices, packages and assemblies. The eWLP methods allow back side electrical and/or thermal connections to be easily and economically made at the eWLP wafer level without having to use thru-mold vias (TMVs) or thru-silicon vias (TSVs) to make such connections. In order to create TMVs, processes such as reactive ion etching or laser drilling followed metallization are needed, which present difficulties and increase costs. In addition, the eWLP methods allow electrical and optical interfaces to be easily and economically formed on the front side and/or on the back side of the eWLP wafer, which allows the eWLP methods to be used to form optoelectronic devices having a variety of useful configurations.

Patent Claims
32 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. An embedded Wafer-Level Packaging (eWLP) method comprising: disposing a plurality of components on an upper side of a first adhesive tape base such that a front side of each component is in contact with an upper side of the first adhesive tape base, each of the components having at least a first electrical contact element disposed on a front side thereof, at least a first type of component of said plurality of components having a second electrical contact element disposed on a back side thereof; placing a mold compound over the plurality of components such that the mold compound encapsulates the components and is in contact with portions of the upper side of the first adhesive tape base; curing the mold compound, wherein the first adhesive tape base having the components disposed thereon and encapsulated in the cured mold compound comprises an eWLP wafer, wherein a front side of the cured mold compound is coplanar with the front sides of the components and wherein a back side of the cured mold compound is opposite and parallel to the front side of the cured mold compound; removing cured mold compound from the back side of the eWLP wafer to provide the eWLP wafer with a predetermined thickness and to expose respective back sides of the respective components, wherein the second electrical contact element disposed on the back side of the first optoelectronic chip is exposed thru the back side of the eWLP wafer; and forming a first metal layer on the back side of the eWLP wafer such that the first metal layer is in contact with the back sides of the components.

2

2. The method of claim 1 , wherein the first component is a first optoelectronic chip.

3

3. The method of claim 2 , wherein at least a second type of component of said plurality of components comprises a bulk material having a predetermined electrical conductivity that is sufficiently high for conducting electrical current from a front side of the second component to a back side of the second component.

4

4. The method of claim 2 , further comprising: after forming the first metal layer on the back side of the eWLP wafer, removing the first adhesive tape base from the eWLP wafer and placing the back side of the eWLP wafer in contact with a second adhesive tape base; forming a second metal layer on the front side of the eWLP wafer such that the second metal layer is in contact with the front sides of the components; and structuring the second metal layer into a structured second metal layer.

5

5. The method of claim 4 , further comprising: forming a dielectric a material layer on top of the structured second metal layer; structuring the dielectric material layer into a structured dielectric material layer; placing third electrical contact elements on the structured second metal layer where there are openings in the structured dielectric material layer, wherein the third electrical contact elements are disposed to make contact with respective electrical contact elements of a printed circuit board (PCB) for electrically interfacing the components with electrical circuitry of the PCB; singulating the eWLP wafer into individual eWLP packages, wherein each eWLP package includes at least a component of the first type and a component of a type that is different from the first type, and wherein each eWLP package has a front side and a back side corresponding to the front side and back side of the eWLP wafer, respectively, and wherein each eWLP package has an electrical interface and an optical interface located on the front side of the eWLP package; and removing the second adhesive tape base from the eWLP wafer.

6

6. The method of claim 1 , wherein at least one of the electrical contact elements is thermally conductive.

7

7. The method of claim 5 , wherein the first optoelectronic chip is an electrical-to-optical (EO) converter chip for converting an optical signal into an electrical signal.

8

8. The method of claim 7 , wherein the EO converter chip is a light-emitting diode (LED) chip.

9

9. The method of claim 8 , wherein the component of the type that is different from the first type is an LED driver chip.

10

10. The method of claim 7 , wherein the EO converter chip is a laser diode chip.

11

11. The method of claim 10 , wherein the component of the type that is different from the first type is a laser diode driver chip.

12

12. The method of claim 10 , wherein the component of the type that is different from the first type is an LED chip.

13

13. The method of claim 10 , wherein the component of the type that is different from the first type is a laser diode chip.

14

14. The method of claim 11 , wherein the component of the type that is different from the first type is a receiver chip for processing the electrical signal.

15

15. The method of claim 2 , further comprising: after forming the first metal layer on the back side of the eWLP wafer, forming a dielectric material layer on top of the first metal layer; structuring the dielectric material layer into a structured dielectric material layer; after structuring the dielectric material layer, removing the first adhesive tape base from the eWLP wafer and placing the back side of the eWLP wafer in contact with a second adhesive tape base; forming a second metal layer on the front side of the eWLP wafer such that the second metal layer is in contact with the front sides of the components; and structuring the second metal layer into a structured second metal layer.

16

16. The method of claim 15 , further comprising: after structuring the second metal layer, removing the second adhesive tape base from the eWLP wafer and placing the structured second metal layer of the eWLP wafer in contact with a third adhesive tape base; and placing third electrical contact elements on the first metal layer where there are openings in the structured dielectric material layer, wherein the third electrical contact elements are disposed to make contact with respective electrical contact elements of a printed circuit board (PCB) for electrically interfacing the components with electrical circuitry of the PCB.

17

17. The method of claim 16 , further comprising: after the third electrical contact elements have been placed, singulating the eWLP wafer into individual eWLP packages, wherein each eWLP package includes at least a component of the first type and a component of a type that is different from the first type, and wherein each eWLP package has a front side and a back side corresponding to the front side and back side of the eWLP wafer, respectively; and removing the third adhesive tape base from the eWLP wafer, and wherein each eWLP package has an electrical interface located on a back side of the eWLP package and an optical interface located on the front side of the eWLP package.

18

18. The method of claim 17 , wherein at least one of the electrical contact elements is thermally conductive.

19

19. The method of claim 17 , wherein the first optoelectronic chip is an electrical-to-optical (EO) converter chip for converting an electrical signal into an optical signal.

20

20. The method of claim 19 , wherein the EO converter chip is a light-emitting diode (LED) chip.

21

21. The method of claim 20 , wherein the component of the type that is different from the first type is an LED driver chip.

22

22. The method of claim 19 , wherein the EO converter chip is a laser diode chip.

23

23. The method of claim 22 , wherein the component of the type that is different from the first type is a laser diode driver chip.

24

24. The method of claim 19 , wherein the component of the type that is different from the first type is an optical-to-electrical (OE) converter chip for converting an optical signal into an electrical signal.

25

25. The method of claim 24 , wherein the OE converter chip is a photodiode chip that includes at least a photodiode.

26

26. The method of claim 25 , wherein the photodiode chip includes an amplifier for amplifying the electrical signal.

27

27. The method of claim 17 , wherein the first optoelectronic chip is an optical-to-electrical (OE) converter chip for converting an optical signal into an electrical signal.

28

28. The method of claim 27 , wherein the OE converter chip is a photodiode chip that includes at least a photodiode for converting an optical signal into an electrical signal.

29

29. The method of claim 28 , wherein the photodiode chip includes an amplifier for amplifying the electrical signal.

30

30. The method of claim 28 , wherein the component of the type that is different from the first type is an LED chip.

31

31. The method of claim 28 , wherein the component of the type that is different from the first type is a laser diode chip.

32

32. The method of claim 29 , wherein the component of the type that is different from the first type is a receiver chip for processing the electrical signal.

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Patent Metadata

Filing Date

March 14, 2014

Publication Date

April 5, 2016

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Cite as: Patentable. “Methods for performing extended wafer-level packaging (eWLP) and eWLP devices made by the methods” (US-9305908). https://patentable.app/patents/US-9305908

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