Patentable/Patents/US-9374615
US-9374615

Parallel rate control for digital video encoder with multi-processor architecture and picture-based look-ahead window

PublishedJune 21, 2016
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A method of operating a multi-processor video encoder by determining a target size corresponding to a preferred number of bits to be used when creating an encoded version of a picture in a group of sequential pictures making up a video sequence. The method includes the steps of calculating a first degree of fullness of a coded picture buffer at a first time, operating on the first degree of fullness to return an estimated second degree of fullness of the coded picture buffer at a second time, and operating on the second degree of fullness to return an initial target sized for the picture. The first time corresponds to the most recent time an accurate degree of fullness of the coded picture buffer can be calculated and the second time occurs after the first time.

Patent Claims
5 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of operating a multi-processor video encoder by determining a target size corresponding to a preferred number of bits to be used when creating an encoded version of a picture in a group of sequential pictures making up a video sequence, the method comprising: a) calculating a first degree of fullness of a coded picture buffer at a first time, b) operating on said first degree of fullness to return an estimated second degree of fullness of said coded picture buffer at a second time, and c) operating on said second degree of fullness to return an initial target size for said picture, wherein said first time corresponds to the most recent time an accurate degree of fullness of said coded picture buffer can be calculated and said second time occurs after said first time; further comprising, prior to step c, creating a modified version of said picture by decimating said picture, and measuring a first degree of complexity of said picture using said modified version, and wherein step c further comprises operating on said first degree of complexity to return said initial target size for said picture.

2

2. A method according to claim 1 , further comprising, subsequently to step c, selecting as the target size for said picture the larger of said initial target size or a minimum acceptable size.

3

3. A method according to claim 2 , wherein said picture is of one of a plurality of picture types and said minimum acceptable size is a function of a bit rate used to transmit pictures of the same picture type as said picture.

4

4. A method according to claim 1 , wherein the method further comprises, prior to step c, calculating a mismatch term, said mismatch term corresponding to an average difference between previously calculated target sizes calculated for a plurality of previously encoded pictures and an actual encoded size for said plurality of previously encoded pictures, and step c further comprises operating on said mismatch term to return said initial target size for said picture.

5

5. A method according to claim 1 , further comprising encoding said picture using said preferred number of bits to select an optimum quantization parameter and using said optimum quantization parameter to control the size, in bits, of an encoded version of said picture.

Classification Codes (CPC)

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Patent Metadata

Filing Date

October 5, 2011

Publication Date

June 21, 2016

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Cite as: Patentable. “Parallel rate control for digital video encoder with multi-processor architecture and picture-based look-ahead window” (US-9374615). https://patentable.app/patents/US-9374615

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