A load device on a secondary side of an isolated switching power converter communicates a digital message to a primary side controller by modulating the load current in accordance with certain predefined timing patterns. The load current modulation is detected by the primary side controller and the digital message is decoded based on the predefined timing patterns. The load device may encode the digital message in order to control the primary side controller to operate in a particular mode compatible with the load device.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A switching power converter to provide power to an electronic device based on a digital message generated by the electronic device, the electronic device generating the digital message by modulating a load current to the electronic device according to a predefined pattern, the switching power converter comprising: a transformer electrically isolating a secondary side of the switching power converter coupled to the electronic device from a primary side; a load current detector to obtain samples of a primary side voltage sense signal representative of a primary side voltage and samples of a current sense signal representing a primary side current, the voltage sense signal and the current sense signal varying based on the modulated load current to the electronic device, the load current detector to generate a load current signal, representing a waveform of the modulated current to the electronic device based on the samples of the voltage sense signal and the samples of the current sense signal; a digital decoder to decode the load current signal to recover the digital message encoding by the electronic device; and a power controller to control switching of a switch to control at least one of an output voltage and an output current to the electronic device based on the voltage sense signal, the current sense signal, and the digital message.
2. The switching power converter of claim 1 , wherein the load current detector comprises: an output current computation block to determine, based on the samples of the voltage sense signal and the samples of the current sense signal, an average current through a secondary winding of the transformer during a previous switching cycle of the power converter; a time machine signal generator to generate an output current signal comprising a sequence of samples representing the average current, the sequence of samples having a duration of the previous switching cycle of the power converter; and a low pass filter to filter the output current signal to estimate the load current signal.
3. The switching power converter of claim 2 , wherein the output current computation block determines the average current at an end of each reset period of the transformer.
4. The switching power converter of claim 2 , wherein the output current computation block comprises: a first counter to receive a reset pulse at an end of a reset period of the transformer and to measure a switching period based on a time difference between consecutive reset pulses; a second counter to receive the reset pulse at the end of the reset period and to receive a train stop pulse when the switch is turned off, and to measure a reset period based on a time difference between the train stop pulse and the reset pulse; and calculate logic to determine the average output current based on the measured switching period and the measured reset period.
5. The switching power converter of claim 2 , wherein the time machine signal generator comprises: a first-in-first-out (FIFO) buffer to receive a signal representing the average current and to receive a signal representing the duration of the previous switching cycle; and a counter to advance the FIFO buffer after a time period based on the duration of the previous switching cycle.
6. The switching power converter of claim 2 , wherein the switching power converter operates according to a pulse frequency modulation control scheme, and wherein a duration of the switching cycle varies for different switching cycles.
7. The switching power converter of claim 2 , wherein the low pass filter comprises: an oversampling first order low pass digital filter having a fixed sampling rate.
8. The switching power converter of claim 2 , wherein the low pass filter comprises: a low pass digital filter having a sample rate that varies based on a switching period of the switching power converter.
9. The switching power converter of claim 1 , wherein the digital decoder comprises: a digital state machine to change from a first state to a second state responsive to detecting a transition between logic states in the load current signal and to decode the digital message based on reaching a final state of the digital state machine.
10. The switching power converter of claim 1 , wherein the power converter provides power to a Universal Serial Bus (USB) device via a Vbus line.
11. A method for detecting a digital message generated by an electronic device coupled to a secondary side of a switching power converter, the switching power converter comprising a switch for controlling current through a transformer that electrically isolating the secondary side from a primary side, the electronic device encoding the digital message by modulating a load current to the electronic device according to a predefined pattern, the method comprising: obtaining, by a primary side controller on the primary side of the switching power converter, samples of a primary side voltage sense signal representative of a primary side voltage and samples of a current sense signal representing a primary side current, the voltage sense signal and the current sense signal varying based on the modulated load current to the electronic device; generating a load current signal representing a waveform of the modulated current to the electronic device based on the samples of the voltage sense signal and the samples of the current sense signal; digitally decoding the load current signal to recover the digital message encoded by the electronic device; and configuring a mode of the primary side controller based on the recovered digital message.
12. The method of claim 11 , wherein generating the load current signal comprises: determining, based on the samples of the voltage sense signal and the samples of the current sense signal, an average current through a secondary winding of the transformer during a previous switching cycle of the power converter; generating an output current signal comprising a sequence of samples representing the average current, the sequence of samples having a duration of the previous switching cycle of the power converter; and low pass filtering the output current signal to estimate the load current signal.
13. The method of claim 12 , wherein determining the average current comprises: detecting an end of a reset period of the transformer; and determining the average current at the end of the reset period.
14. The method of claim 12 , wherein determining the average current comprises: receiving a reset pulse at an end each reset period of the transformer; receiving a train stop pulse each time the switch is turned off; measuring a switching period based on a time difference between consecutive reset pulses; measuring a reset period based on a time difference between the train stop pulse and the reset pulse; and determining the average output current based on the measured switching period and the measured reset period.
15. The method of claim 12 , wherein generating the output current signal comprises: storing values representing the average current and values representing the duration of the previous switching cycle in a first-in-first-out (FIFO) buffer; and using a counter to advance the FIFO buffer after a time period based on the duration of the previous switching cycle.
16. The method of claim 12 , wherein the switching power converter operates according to a pulse frequency modulation control scheme, and wherein a duration of the switching cycle varies for different switching cycles.
17. The method of claim 12 , wherein low pass filtering the output current signal comprises: applying an oversampling first order low pass digital filter having a fixed sampling rate.
18. The method of claim 12 , wherein low pass filtering the output current signal comprises: applying a low pass digital filter having a sample rate that varies based on a switching period of the switching power converter.
19. The method of claim 11 , wherein digitally decoding the load current signal comprises: changing a state of a digital state machine from a first state to a second state responsive to detecting a transition between logic states in the load current signal; and decoding the digital message based on reaching a final state of the digital state machine.
20. The method of claim 11 , wherein the power converter provides power to a Universal Serial Bus (USB) device via a Vbus line.
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December 9, 2014
June 28, 2016
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