A compensating current is applied at one or more points in a signal processing path to compensate for one or both of a dark or offset current present in an input signal. In certain implementations, the dark or offset current is present in a signal generated by a photomultiplier device. The dark or offset current may be monitored in an output of the signal processing path and, the monitoring being used to determine how much compensation is needed in the signal processing path and to allocate where in the signal processing path the compensation current will be applied.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A detector module, comprising: an application specific integrated circuit (ASIC) that comprises: one or more channel inputs configured to receive respective analog inputs from one or more photo-sensors; a front-end circuit configured to receive the analog inputs and to output at least initial energy signals, the front-end circuit comprising a respective front end amplifier for each analog input; a weighting circuit configured to receive the initial energy signals and configured to output weighted signals, wherein the weighting circuit comprises weighting amplifiers; an energy summing circuit configured to receive the weighted signals and configured to output at least a summed energy signal, wherein the energy summing circuit comprises a summing amplifier; and a controller configured to measure a dark current present in the summed energy signal; to determine a compensation current sufficient to counter the dark current, and to apply the compensation current through one or more of the front-end, weighting, or summing amplifiers.
2. The detector module of claim 1 , wherein the controller is separate from the ASIC.
3. The detector module of claim 1 , wherein the controller is provided on the ASIC.
4. The detector module of claim 1 , wherein applying the compensation current through the one or more of the amplifiers comprises adjusting one or more programmable sources and/or sinks associated with the one or more amplifiers.
5. The detector module of claim 1 , wherein the one or more photo-sensors comprise silicon photomultipliers (SiPMs).
6. The detector module of claim 1 , wherein the weighting amplifiers are configured to weight the respective initial energy signals derived from the analog inputs to generate the weighted signals.
7. The detector module of claim 1 , wherein the summing amplifier is configured to combine the weighted signals and to output the summed energy signal.
8. The defector module of claim 1 , wherein the front end amplifiers, weighting amplifiers, and a summing amplifier are configured to, in cooperation, process the analog inputs to generate the summed energy signal.
9. The detector module of claim 1 , wherein the controller allocates a portion of the compensation current to each of the front end amplifiers, the weighting amplifiers, and the summing amplifier.
10. The detector module of claim 1 , wherein the respective analog inputs each comprise a dark current component and a signal component.
11. The detector module of claim 1 , wherein the summed energy signal is indicative of at least an energy associated with a photon impact detected by the one or more photo-sensors.
12. A detector system, comprising: a plurality of photo-sensors configured to each generate a respective measured signal, wherein each measured signal comprises a dark current component and a signal component; an application specific integrated circuit (ASIC) configured to receive the measured signals as inputs, to process the measured signals along a signal processing path to generate at least an output energy signal, and to apply a compensation current at one or more points in the signal processing path to compensate the dark current component in the output energy signal, wherein the signal processing path of the ASIC comprises: a front-end circuit configured to receive the measured signals and to output at least initial energy signals, the front-end circuit comprising a plurality of front end amplifiers; a weighting circuit configured to receive the initial energy signals and configured to output weighted signals, wherein the weighting circuit comprises weighting amplifiers; an energy summing circuit configured to receive the weighted signals and configured to output at least the output energy signal, wherein the energy summing circuit comprises a summing amplifier.
13. The detector system of claim 12 , wherein the ASIC is further configured to determine the amplitude of the compensation current by monitoring the output energy signal.
14. The detector system of claim 12 , wherein the ASIC is further configured to allocate the compensation current between multiple points in the signal processing path.
15. The detector system of claim 12 , wherein the compensation current is applied at the one or more points in the signal processing path by programming one or more programmable sources and/or sinks within the signal processing path.
16. The detector system of claim 15 , wherein the one or more programmable sources and/or sinks are provided as components of one or more of the front cod amplifiers, weighting amplifiers, or summing amplifier within the signal processing path.
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October 23, 2013
August 2, 2016
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