A silicon carbide substrate includes a first impurity region, a well region in contact with the first impurity region, and a second impurity region separated from the first impurity region by the well region. A first main surface includes a first region in contact with a channel region, and a second region different from the first region. A silicon-containing material is formed on the second region. A first silicon dioxide region is formed on the first region. A second silicon dioxide region is formed by oxidizing the silicon-containing material. A gate runner is electrically connected to a gate electrode and formed in a position facing the second silicon dioxide region. Consequently, a silicon carbide semiconductor device capable of achieving improved insulation performance between the gate runner and the substrate while the surface roughness of the substrate is suppressed, and a method of manufacturing the same can be provided.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of manufacturing a silicon carbide semiconductor device, comprising the step of preparing a silicon carbide substrate including a first main surface and a second main surface facing each other, said silicon carbide substrate including a first impurity region having a first conductivity type, a well region being in contact with said first impurity region and having a second conductivity type different from said first conductivity type, and a second impurity region separated from said first impurity region by said well region and having said first conductivity type, said first main surface including a first region in contact with a channel region sandwiched between said first impurity region and said second impurity region, and a second region different from said first region, said method further comprising the steps of: forming a silicon-containing-material on said second region, wherein the silicon-containing-material is polysilicon, amorphous silicon, amorphous silicon carbide or single-crystal silicon; forming a first silicon dioxide region on said first region; forming a second silicon dioxide region by oxidizing said silicon-containing-material; forming a gate electrode in contact with said first silicon dioxide region and said second silicon dioxide region; and forming a gate runner electrically connected to said gate electrode and arranged in a position facing said second silicon dioxide region, a thickness of said second silicon dioxide region being greater than a thickness of said first silicon dioxide region.
2. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein said step of forming a first silicon dioxide region and said step of forming a second silicon dioxide region are performed by simultaneously oxidizing said first region and said silicon-containing-material.
3. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein the thickness of said second silicon dioxide region is 1.5 times or more and 5 times or less the thickness of said first silicon dioxide region.
4. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , further comprising the step of forming a source wire arranged so as to be surrounded by said gate runner when viewed two-dimensionally.
5. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein said gate runner is formed on an outer side relative to said second impurity region.
6. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein said silicon carbide substrate further includes a JTE region in contact with said well region, and said gate runner is formed on an inner side relative to said JTE region.
7. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein said second silicon dioxide region is formed so as to be in contact with an end portion of said first main surface.
8. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , further comprising the step of forming a source wire arranged so as to sandwich said gate runner there between when viewed two-dimensionally.
9. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , wherein said step of forming a gate runner includes the step of forming a gate pad for applying a voltage to said gate runner, and said gate runner is formed so as to extend from said gate pad in a branching manner.
10. The method of manufacturing a silicon carbide semiconductor device according to claim 1 , further comprising the steps of: forming a second silicon-containing-material in contact with said first impurity region; and forming a third silicon dioxide region by oxidizing said second silicon-containing-material.
11. The method of manufacturing a silicon carbide semiconductor device according to claim 10 , wherein said step of forming a second silicon dioxide region and said step of forming a third silicon dioxide region are simultaneously performed.
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October 8, 2013
September 20, 2016
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