Patentable/Patents/US-9466756
US-9466756

Semiconductor device and manufacturing method thereof

PublishedOctober 11, 2016
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

An object is to improve reliability of a semiconductor device. A semiconductor device including a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate is provided. The driver circuit portion and the display portion include thin film transistors in which a semiconductor layer includes an oxide semiconductor; a first wiring; and a second wiring. The thin film transistors each include a source electrode layer and a drain electrode layer which each have a shape whose end portions are located on an inner side than end portions of the semiconductor layer. In the thin film transistor in the driver circuit portion, the semiconductor layer is provided between a gate electrode layer and a conductive layer. The first wiring and the second wiring are electrically connected in an opening provided in a gate insulating layer through an oxide conductive layer.

Patent Claims
14 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method of manufacturing a semiconductor device, the method comprising steps of: forming a first gate electrode layer and a second gate electrode layer over a substrate; forming a gate insulating layer over the first gate electrode layer and the second gate electrode layer; forming an oxide semiconductor layer over the gate insulating layer; performing a first heat treatment for reducing a resistivity of the oxide semiconductor layer; forming a first conductive layer over the oxide semiconductor layer; forming a first resist mask comprising a first region and a second region with a thickness smaller than a thickness of the first region over the first conductive layer; etching the first conductive layer and the oxide semiconductor layer to form a first island-shape oxide semiconductor layer overlapped with the first gate electrode layer, a second island-shape oxide semiconductor layer overlapped with the second gate electrode layer, a first island-shape conductive layer over the first island-shape oxide semiconductor layer and a second island-shape conductive layer over the second island-shape oxide semiconductor layer by using the first resist mask; ashing the first resist mask to form a second resist mask by removing the second region; etching the first island-shape conductive layer and the second island-shape conductive layer to form a first source electrode layer electrically connected to the first island-shape oxide semiconductor layer, a first drain electrode layer electrically connected to the first island-shape oxide semiconductor layer, a second source electrode layer electrically connected to the second island-shape oxide semiconductor layer and a second drain electrode layer electrically connected to the second island-shape oxide semiconductor layer by using the second resist mask; forming an oxide insulating layer over the first island-shape oxide semiconductor layer, the second island-shape oxide semiconductor layer, the first source electrode layer, the first drain electrode layer, the second source electrode layer and the second drain electrode layer; performing a second heat treatment on the first island-shape oxide semiconductor layer, the second island-shape oxide semiconductor layer, and the oxide insulating layer; forming a transparent conductive film over the oxide insulating layer; etching the transparent conductive film to form a pixel electrode layer electrically connected to the second drain electrode layer and a second conductive layer overlapped with the first gate electrode layer; and forming a liquid crystal layer over the pixel electrode layer; wherein each of the first island-shape oxide semiconductor layer and the second island-shape oxide semiconductor layer includes a region which is in contact with the oxide insulating layer, and wherein the resistivity of the region is increased by the second heat treatment.

2

2. The semiconductor device according to claim 1 , wherein the first heat treatment is performed in an atmosphere of nitrogen gas.

3

3. The semiconductor device according to claim 1 , further comprising the steps of: heating for dehydrating or dehydrogenating the gate insulating layer before the step of forming the oxide semiconductor layer.

4

4. The semiconductor device according to claim 1 , wherein the region is in an oxygen-excess state by the second heat treatment.

5

5. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer is subjected to dehydration or dehydrogenation by the first heat treatment.

6

6. The semiconductor device according to claim 1 , wherein the first heat treatment is performed in a nitrogen atmosphere with an H 2 O concentration of 20 ppm or lower.

7

7. The semiconductor device according to claim 1 , wherein a temperature of the first heat treatment is higher than a temperature of the second heat treatment.

8

8. A method of manufacturing a semiconductor device, the method comprising steps of: forming a first gate electrode layer and a second gate electrode layer over a substrate; forming a gate insulating layer over the first gate electrode layer and the second gate electrode layer; forming an oxide semiconductor layer over the gate insulating layer; performing a first heat treatment in an atmosphere of an inert gas for reducing a resistivity of the oxide semiconductor layer; forming a first conductive layer over the oxide semiconductor layer; forming a first resist mask comprising a first region and a second region with a thickness smaller than a thickness of the first region over the first conductive layer; etching the first conductive layer and the oxide semiconductor layer to form a first island-shape oxide semiconductor layer overlapped with the first gate electrode layer, a second island-shape oxide semiconductor layer overlapped with the second gate electrode layer, a first island-shape conductive layer over the first island-shape oxide semiconductor layer and a second island-shape conductive layer over the second island-shape oxide semiconductor layer by using the first resist mask; ashing the first resist mask to form a second resist mask by removing the second region; etching the first island-shape conductive layer and the second island-shape conductive layer to form a first source electrode layer electrically connected to the first island-shape oxide semiconductor layer, a first drain electrode layer electrically connected to the first island-shape oxide semiconductor layer, a second source electrode layer electrically connected to the second island-shape oxide semiconductor layer and a second drain electrode layer electrically connected to the second island-shape oxide semiconductor layer by using the second resist mask; forming an oxide insulating layer over the first island-shape oxide semiconductor layer, the second island-shape oxide semiconductor layer, the first source electrode layer, the first drain electrode layer, the second source electrode layer and the second drain electrode layer; performing a second heat treatment on the first island-shape oxide semiconductor layer, the second island-shape oxide semiconductor layer, and the oxide insulating layer in an atmosphere of an inert gas; forming a transparent conductive film over the oxide insulating layer; etching the transparent conductive film to form a pixel electrode layer electrically connected to the second drain electrode layer and a second conductive layer overlapped with the first gate electrode layer; and forming a liquid crystal layer over the pixel electrode layer, wherein each of the first island-shape oxide semiconductor layer and the second island-shape oxide semiconductor layer includes a region which is in contact with the oxide insulating layer, and wherein the resistivity of the region is increased by the second heat treatment.

9

9. The semiconductor device according to claim 8 , wherein the first heat treatment and the second heat treatment are performed in an atmosphere of nitrogen gas.

10

10. The semiconductor device according to claim 8 , further comprising the steps of: heating for dehydrating or dehydrogenating the gate insulating layer before the step of forming the oxide semiconductor layer.

11

11. The semiconductor device according to claim 8 , wherein the region is in an oxygen-excess state by the second heat treatment.

12

12. The semiconductor device according to claim 8 , wherein the oxide semiconductor layer is subjected to dehydration or dehydrogenation by the first heat treatment.

13

13. The semiconductor device according to claim 8 , wherein the first heat treatment is performed in a nitrogen atmosphere with an H 2 O concentration of 20 ppm or lower.

14

14. The semiconductor device according to claim 8 , wherein a temperature of the first heat treatment is higher than a temperature of the second heat treatment.

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Patent Metadata

Filing Date

July 9, 2013

Publication Date

October 11, 2016

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