A method is provided for forming an unsupported MoS2 layer in an aqueous medium, the method comprising the steps of: providing an assembly of a Mo oxide layer on a Si substrate; annealing said assembly in presence of H2S at a temperature sufficient for forming a MoS2 layer; and contacting the annealed assembly with an aqueous medium. This unsupported MoS2 layer can then be transferred by dip-coating to another substrate such as a dielectric substrate.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for forming an unsupported MoS 2 layer in an aqueous medium, comprising: providing an assembly of a Mo oxide layer on a Si substrate; annealing the assembly in a presence of H 2 S at a temperature sufficient to form an annealed MoS 2 layer; and contacting the annealed assembly with an aqueous medium, whereby an unsupported MoS 2 layer is obtained.
2. The method of claim 1 , wherein the contacting comprises immersing the annealed assembly in the aqueous medium.
3. The method of claim 1 , wherein an area of the unsupported MoS 2 layer is at least 1 cm 2 .
4. The method of claim 1 , wherein the annealing is performed in a presence of pure H 2 5.
5. The method of claim 1 , wherein the annealing is performed at a pressure of from 50 mbar to 200 mbar.
6. The method of claim 1 , wherein the annealing comprises: annealing the assembly at a temperature of from 520° C. to 680° C. for from 5 minutes to 50 minutes; and thereafter annealing the assembly at a temperature of from 720° C. to 880° C. for from 1 minute to 10 minutes.
7. The method of claim 1 , wherein the annealed MoS 2 layer comprises residual MoO 3 .
8. The method of claim 7 , wherein the residual MoO 3 represents from 1% to 12% of the annealed MoS 2 layer.
9. The method of claim 7 , wherein the residual MoO 3 is in a layer located at an interface between the Si substrate and the annealed MoS 2 layer.
10. A method for providing a MoS 2 coating layer on a second substrate, the method comprising: forming an unsupported MoS 2 layer in an aqueous medium by the method of claim 1 ; dip coating a second substrate different from the Si substrate by immersing the second substrate in the aqueous medium; and thereafter withdrawing the second substrate from the aqueous medium, whereby the second substrate is coated with a MoS 2 coating layer.
11. The method of claim 10 , wherein the second substrate is a dielectric substrate.
12. An assembly, comprising: a Si substrate; a MoO 3 layer overlaying the Si substrate; and a MoS 2 layer overlaying the MoO 3 layer.
13. The assembly of claim 12 , wherein the assembly is a component of a semiconductor device.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
November 11, 2015
October 18, 2016
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