A semiconductor device includes a circuit block that is switchable between selection and non-selection, and a leakage current control circuit disposed between the circuit block and a first power supply line. The leakage current control circuit includes a first transistor disposed between the circuit block and the first power supply line, and a resistor device disposed between the circuit block and the first power supply line.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device comprising: a circuit block configured to be switchable between selection and non-selection; and a leakage current control circuit disposed between the circuit block and a first power supply line, wherein the leakage current control circuit includes: a first transistor disposed between the circuit block and the first power supply line; a resistor device disposed between the circuit block and the first power supply line; and a second transistor disposed between the circuit block and the first power supply line, the second transistor being connected in series to the resistor device, and wherein when the circuit block is selected and operated, the first transistor is switched on to connect the first power supply line with the circuit block, when the circuit block is caused to be non-selective and stopped, the first transistor is switched off to block the first power supply line from the circuit block, and the second transistor is switched off when the first transistor is switched on, and is switched on when the first transistor is switched off.
2. The semiconductor device according to claim 1 , wherein the resistor device includes a characteristic where a resistance value increases with an increase in temperature.
3. The semiconductor device according to claim 2 , wherein the resistor device is a silicide resistor.
4. A semiconductor storage device comprising: a word line driver block configured to be switchable between selection and non-selection; and a leakage current control circuit disposed between the word line driver block and a first power supply line, wherein the leakage current control circuit includes: a first transistor disposed between the word line driver block and the first power supply line; a first resistor device disposed between the word line driver block and the first power supply line; and a second transistor disposed between the word line driver block and the first power supply line, the transistor being connected in series to the first resistor device, and wherein when the word line driver block is selected and operated, the first transistor is switched on to connect the first power supply line with the word line driver block, when the word line driver block is caused to be non-selective and stopped, the first transistor is switched off to block the first power supply line from the word line driver block, and the second transistor is switched off when the first transistor is switched on, and is switched on when the first transistor is switched off.
5. The semiconductor storage device according to claim 4 , wherein the leakage current control circuit further includes: an inverter configured to invert a first control signal input to a gate of the second transistor to input the inverted signal to a gate of the first transistor.
6. The semiconductor storage device according to claim 4 , wherein the word line driver block includes a plurality of final stage inverters each driving a word line, and wherein the first transistor and the first resistor device are disposed between the first power supply line feeding a high-potential power supply voltage and a first local line connected to a source of a p-channel type MOS transistor in each of the plurality of final stage inverters.
7. The semiconductor storage device according to claim 5 , wherein the first resistor device is connected to the first power supply line, the second transistor is connected to a first local line, and a second local line of the plurality of final stage inverters is connected to a second power supply line feeding a low-potential power supply voltage of which voltage value is lower than a voltage value of the high-potential power supply voltage.
8. The semiconductor storage device according to claim 7 , wherein the word line driver block further includes: a plurality of preinverters disposed in a previous stage of the plurality of final stage inverters, the preinverters each driving corresponding final stage inverter, and the leakage current control circuit further includes: a third transistor disposed between the second power supply line and a third local line connected to a source of an n-channel type MOS transistor in each of the plurality of preinverters; and a second resistor device and a fourth transistor connected in series between the second power supply line and the third local line, and wherein when the word line driver block is selected and operated, the third transistor is switched on and the fourth transistor is switched off, and when the word line driver block is caused to be non-selective and stopped, the third transistor is switched off and the fourth transistor is switched on.
9. The semiconductor storage device according to claim 8 , wherein the second resistor device is connected to the second power supply line, the fourth transistor is connected to the third local line, and a fourth local line of the plurality of preinverters is connected to the first power supply line.
10. The semiconductor storage device according to claim 8 , wherein the first transistor and the second transistor are each a p-channel type MOS transistor, and the third transistor and the fourth transistor are each an n-channel type MOS transistor.
11. The semiconductor storage device according claim 4 , wherein the first resistor device includes a characteristic where a resistance value increases with an increase in temperature.
12. The semiconductor storage device according to claim 11 , wherein the first resistor device is a silicide resistor.
13. The semiconductor storage device according to claim 8 , wherein the second resistor device includes a characteristic where a resistance value increases with an increase in temperature.
14. The semiconductor storage device according to claim 13 , wherein the second resistor device is a silicide resistor.
15. The semiconductor storage device according to claim 4 , wherein the semiconductor storage device is an SRAM.
16. The semiconductor storage device according claim 4 , wherein the semiconductor storage device comprises a plurality of the word line driver blocks each of which includes the leakage current control circuit.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
February 2, 2015
November 1, 2016
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