Patentable/Patents/US-9508416
US-9508416

Power-up signal generation circuit

PublishedNovember 29, 2016
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A power-up signal generation circuit includes a control signal generation unit suitable for generating first and second control voltages based on a power-up signal, a level tracing voltage generation unit suitable for generating a level tracing voltage whose voltage level varies based on the first and second control voltages, and a power-up signal generation unit suitable for generating the power-up signal based on the level tracing voltage, and providing a feedback on the power-up signal to the control signal generation unit.

Patent Claims
16 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A power-up signal generation circuit comprising: a control signal generation unit suitable for generating first and second control voltages based on a power-up signal; a level tracing voltage generation unit suitable for generating a level tracing voltage with a voltage level that varies based on the first and second control voltages; and a power-up signal generation unit suitable for generating the power-up signal based on the level tracing voltage, and providing feedback on the power-up signal to the control signal generation unit, wherein the first control voltage is initialized to a first voltage and the second control voltage is initialized to a second voltage before the power-up signal is activated, and wherein the voltage levels of the first and second control voltages are inverted, respectively, whenever the power-up signal toggles after the power-up signal is activated.

2

2. The power-up signal generation circuit of claim 1 , wherein the level tracing voltage generation unit comprises: first and second variable resistors coupled in series between a supply voltage terminal and a ground voltage terminal, wherein the level tracing voltage is outputted from a first node between the first and second variable resistors.

3

3. The power-up signal generation circuit of claim 2 , wherein a resistance of the first variable resistor is inversely proportional to a voltage level of the first control voltage, and a resistance of the second variable resistor is inversely proportional to a voltage level of the second control voltage.

4

4. The power-up signal generation circuit of claim 3 , wherein, before the power-up signal is activated, the control signal generation unit generates the first control voltage such that the resistance of the first variable resistor is set to a minimum value, and generates the second control voltage such that the resistance of the second variable resistor becomes gradually lower than the resistance of the first variable resistor.

5

5. The power-up signal generation circuit of claim 3 , wherein, after the power-up signal is activated, the control signal generation unit generates the second control voltage such that the resistance of the second variable resistor is set to a minimum value, and generates the first control voltage such that the resistance of the first variable resistor becomes gradually lower than the resistance of the second variable resistor.

6

6. The power-up signal generation circuit of claim 1 , wherein the power-up signal generation unit comprises: a detection voltage generation section suitable for generating a detection voltage based on the level tracing voltage; and a power-up signal output section suitable for outputting the power-up signal by inverting the detection voltage.

7

7. The power-up signal generation circuit of claim 6 , wherein the detection voltage generation section comprises a PMOS transistor and a NMOS transistor coupled in series between a supply voltage terminal and a ground voltage terminal, wherein the detection voltage is outputted from a second node between the PMOS transistor and the NMOS transistor.

8

8. The power-up signal generation circuit of claim 7 , wherein the PMOS transistor maintains a voltage of the second node at a supply voltage level, and the NMOS transistor is turned on based on the level tracing voltage and adjusts the voltage of the second node to have a value between the supply voltage level and a ground voltage level.

9

9. The power-up signal generation circuit of claim 1 , wherein the control signal generation unit generates the first control voltage having a ground voltage level and generates the second control voltage having a supply voltage level before the power-up signal is activated; and the control signal generation unit inverts and outputs voltage levels of the first and second control voltages when the power-up signal toggles after the power-up signal is activated.

10

10. The power-up signal generation circuit of claim 9 , wherein the control signal generation unit includes: a first rising edge-triggered flip-flop suitable for receiving a ground voltage at its data input terminal and the power-up signal at its clock terminal, and outputting the first control voltage at its output terminal; a second rising edge-triggered flip-flop suitable for receiving a supply voltage at its data input terminal and the power-up signal at its clock terminal, and outputting the second control voltage at its output terminal; and an initialization section suitable for initializing the first control voltage to the ground voltage and the second control voltage to the supply voltage before the power-up signal is activated.

11

11. The power-up signal generation circuit of claim 2 , wherein a resistance of the first variable resistor is inversely proportional to a voltage level of the first control voltage, and a resistance of the second variable resistor is inversely proportional to a voltage level of the second control voltage.

12

12. The power-up signal generation circuit of claim 11 , wherein, before the power-up signal is activated, the control signal generation unit generates the second control voltage such that the resistance of the second variable resistor is set to a minimum value, and generates the first control voltage such that the resistance of the first variable resistor gradually becomes lower than the resistance of the second variable resistor.

13

13. The power-up signal generation circuit of claim 11 , wherein, after the power-up signal is activated, the control signal generation unit generates the first control voltage such that the resistance of the first variable resistor is set to a minimum value, and generates the second control voltage such that the resistance of the second variable resistor gradually becomes lower than the resistance of the first variable resistor.

14

14. The power-up signal generation circuit of claim 1 , when the power-up signal is activated, the voltage level of the level tracing voltage is higher than before the power-up signal is activated.

15

15. A power-up signal generation circuit comprising: a control signal generation unit suitable for generating first and second control voltages based on a power-up signal; a level tracing voltage generation unit suitable for generating a level tracing voltage with a voltage level that varies based on the first and second control voltages, wherein, when the power-up signal is activated, the voltage level of the level tracing voltage is higher than before the power-up signal is activated; and a power-up signal generation unit suitable for generating the power-up signal based on the level tracing voltage, and providing feedback on the power-up signal to the control signal generation unit, wherein the level tracing voltage generation unit comprises first and second variable resistors and a compensation unit coupled in series between a supply voltage terminal and a ground voltage terminal, and wherein the compensation unit is enabled based on a voltage level of a third node between the first and second variable resistors, and the level tracing voltage is outputted from a fourth node between the second variable resistor and the compensation unit.

16

16. A power-up signal generation circuit comprising: a control signal generation unit suitable for generating first and second control voltages based on a power-up signal; a level tracing voltage generation unit suitable for generating a level tracing voltage with a voltage level that varies based on the first and second control voltages, wherein, when the power-up signal is activated, the voltage level of the level tracing voltage is higher than before the power-up signal is activated; and a power-up signal generation unit suitable for generating the power-up signal based on the level tracing voltage, and providing feedback on the power-up signal to the control signal generation unit, wherein the control signal generation unit generates the first control voltage having a supply voltage level and generates the second control voltage having a ground voltage level before the power-up signal is activated, and the control signal generation unit inverts and outputs voltage levels of the first and second control voltages when the power-up signal toggles after the power-up signal is activated, wherein the control signal generation unit includes: a first falling edge-triggered flip-flop suitable for receiving a ground voltage at its data input terminal and the power-up signal at its clock terminal, and outputting the first control voltage at its output terminal; a second falling edge-triggered flip-flop suitable for receiving a supply voltage at its data input terminal and the power-up signal at its clock terminal, and outputting the second control voltage at its output terminal; and an initialization section suitable for initializing the first control voltage to the ground voltage and the second control voltage to the supply voltage before the power-up signal is activated.

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Patent Metadata

Filing Date

September 11, 2014

Publication Date

November 29, 2016

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