An integrated circuit system having: (A) a semiconductor chip with a signal strip conductor disposed on an upper surface of the chip; an active semiconductor device disposed of the upper surface of the chip electrically connected to the signal strip conductor; and a first ground plane conductor disposed on a bottom surface of the chip disposed under the signal strip conductor; and (B) a support structure having: a second ground plane disposed over, and separated from, the signal strip conductor by a dielectric region between the second ground plane and the signal strip conductor on the chip; a signal contact disposed on the bottom surface of the support structure displaced, electrically insulated, from the second ground plane conductor, and electrically connected to a portion of the signal strip conductor. The signal strip conductor, the first ground plane conductor, and the second ground plane conductor provide a stripline microwave transmission line.
Legal claims defining the scope of protection, as filed with the USPTO.
1. An integrated circuit system comprising: a semiconductor chip, comprising: a signal strip conductor disposed on an upper surface of the chip; an active semiconductor device disposed of the upper surface of the chip electrically connected to the signal strip conductor; and a first ground plane conductor disposed on a bottom surface of the chip and being disposed under the signal strip conductor; and a support structure, comprising: a second ground plane conductor disposed on a bottom surface, and separated from, the signal strip conductor by a dielectric region between the second ground plane conductor and the signal strip conductor on the chip; and a signal contact disposed on the bottom surface of the a support structure displaced, and electrically insulated from, the second ground plane conductor, and electrically connected to a portion of the signal strip conductor; and wherein the signal strip conductor, the first ground plane conductor, and the second ground plane conductor provide a stripline microwave transmission line.
2. An integrated circuit system, comprising: a support structure, comprising: a ground plane conductor on one portion of a surface of the support structure and signal contacts on different, dielectrically separated, portions of the surface; a semiconductor chip, comprising: a ground plane conductor disposed on a surface of the chip; a plurality of active and passive devices, interconnecting signal strip conductors electrically interconnecting the active and passive devices, and electrically conducive signal bump interconnects connected to the signal strip conductors disposed on an opposite surface of the chip, the electrically conducive signal bump interconnects project outwardly from the surface of the chip and being electrically connected to the signal contacts on the support structure; wherein a dielectric region is formed by the projecting electrically conductive bump interconnects between the ground plane on the support structure and the interconnecting signal strip conductors; and wherein the ground plane on the support structure, the dielectric region, the interconnecting strip conductors, and the ground plane conductor of the opposite surface of the chip provide stripline microwave transmission lines for passing microwave signals among the active and passive devices.
3. The integrated circuit system recited in claim 2 wherein the chip has electrically conductive ground bump interconnects projecting outwardly from the surface of the chip and electrically connected to the second ground plane on the support structure.
4. The integrated circuit system recited in claim 3 wherein the chip has electrically conductive vias passing between the ground bump interconnects and the first ground plane conductor.
5. An integrated circuit system, comprising: (A) a monolithic integrated circuit semiconductor chip, comprising: a first signal strip conductor disposed on an upper surface of the chip; an active semiconductor disposed of the upper surface of the chip electrically connected to the first signal strip conductor; a first ground plane conductor on a bottom surface of the chip, the ground plane conductor being disposed under the first signal strip conductor an ground plane interconnect pad disposed on the upper surface of the chip over the first ground plane conductor, displaced and electrically insulated from, the first signal strip conductor; an electrically conductive via passing through the chip electrically interconnecting the first ground plane conductor to a bottom surface of the ground plane interconnect pad; a plurality of electrically interconnecting bump interconnects, a first one of the plurality of electrically interconnecting bump interconnects having a bottom surface disposed on, and electrically connected to, the signal strip conductor and a second one of the plurality of electrically interconnecting bump interconnects having a bottom surface disposed on, and electrically connected to, an upper surface of the ground plane interconnect pad, the plurality of electrically interconnecting bump interconnects extending above the upper surface of the chip; and (B) a support structure, comprising: a second ground plane conductor disposed on a bottom surface of the support structure and electrically connected to an upper surface of the second one of the plurality of electrically interconnecting bump interconnects; a second signal strip conductor having a portion disposed over a portion of the second ground plane conductor; a signal contact disposed on the bottom surface of the support structure displaced and electrically insulated from the second ground plane conductor; a signal conductive via extending into the support structure electrically interconnecting the signal contact to the second signal conductor; and a third ground plane; (C) wherein the signal contact is disposed on, and electrically connected to, an upper surface of the first one of the plurality of electrically interconnecting bump interconnects; (D) wherein the signal strip conductor, the first ground plane conductor, the second ground plane conductor, and the chip and a bottom portion of the support structure provide a stripline microwave transmission line; and (E) wherein the portion of the second signal conductor and the portion of the second ground plane conductor, the third ground plane, and a portion of the support structure disposed between the third ground plane, the second signal conductor, and the portion of the second ground plane conductor provide a strip transmission line.
6. The integrated circuit recited in claim 1 wherein the support structure comprises a printed circuit board.
7. The integrated circuit recited in claim 2 wherein the support structure comprises a printed circuit board.
8. The integrated circuit recited in claim 5 wherein the support structure comprises a printed circuit board.
9. The integrated circuit recited in claim 1 wherein a dielectric region above the strip conductor is a material different from a dielectric material below the strip conductor.
10. The integrated circuit recited in claim 2 wherein a dielectric region above the strip conductor is a material different from a dielectric material below the strip conductor.
11. The integrated circuit recited in claim 5 wherein a dielectric region above the strip conductor is a material different from a dielectric material below the strip conductor.
12. The integrated circuit recited in claim 9 wherein the support structure comprises a printed circuit board.
13. The integrated circuit recited in claim 10 wherein the support structure comprises a printed circuit board.
14. The integrated circuit recited in claim 11 wherein the support structure comprises a printed circuit board.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
December 28, 2015
December 13, 2016
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