A semiconductor device includes a first substrate, a second substrate stacked over the first substrate, and a pillar member extending obliquely between the first and second substrates. The first substrate includes a mounting surface on which a semiconductor chip is mounted, with a resin interposed between the semiconductor chip and the mounting surface and extending beyond the periphery of the semiconductor chip on the mounting surface. The first substrate further includes a first pad forming part of the mounting surface and disposed outside the resin. The second substrate includes a second pad forming part of its surface facing toward the mounting surface. The second pad at least overlaps the resin when viewed in a direction in which the second substrate is stacked over the first substrate. The pillar member has first and second ends joined to the first and second pads, respectively, to electrically connect the first and second substrates.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A semiconductor device, comprising: a first substrate, including a mounting surface on which a first semiconductor chip is mounted, with a first resin interposed between the first semiconductor chip and the mounting surface, the first resin extending beyond a periphery of the first semiconductor chip on the mounting surface; and a first pad forming a part of the mounting surface, the first pad being disposed outside the first resin; a second substrate stacked over the first substrate, the second substrate including a first surface and a second surface that are on opposite sides of the second substrate, the second surface facing toward the mounting surface of the first substrate; and a second pad forming a part of the second surface, the second pad at least overlapping the first resin when viewed in a stacking direction in which the second substrate is stacked over the first substrate; and a pillar member extending obliquely between the first substrate and the second substrate, the pillar member having a first end joined to the first pad and a second end joined to the second pad to electrically connect the first substrate and the second substrate.
2. The semiconductor device as claimed in claim 1 , wherein the pillar member includes a pillar-shaped core having an exterior circumferential surface coated with solder plating, and the solder plating extends onto and is joined to the first pad and the second pad.
3. The semiconductor device as claimed in claim 2 , wherein the core has first and second opposite ends that are in contact with the first pad and the second pad, respectively.
4. The semiconductor device as claimed in claim 1 , further comprising: a second semiconductor chip on the first surface of the second substrate, wherein the second substrate further includes a via piercing through the second substrate, and wherein the second pad and an electrode of the second semiconductor chip are aligned when viewed in the stacking direction and are electrically connected through the via.
5. The semiconductor device as claimed in claim 1 , further comprising: a projection provided between the first pad and the first resin on the mounting surface of the first substrate, and projecting toward the second substrate and contacting the pillar member.
6. The semiconductor device as claimed in claim 1 , further comprising: a projection provided on the second surface of the second substrate, and projecting toward the first substrate and contacting the pillar member, the projection being on an opposite side of the second pad from a position that is over the first semiconductor chip when viewed in the stacking direction.
7. The semiconductor device as claimed in claim 1 , further comprising: a second resin filling in a space between the first substrate and the second substrate.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
May 16, 2016
February 7, 2017
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