A method of forming semiconductor devices includes providing a wafer having a first side and second side, electrically conductive pads at the second side, and an electrically insulative layer at the second side with openings to the pads. The first side of the wafer is background to a desired thickness and an electrically conductive layer is deposited thereon. Nickel layers are simultaneously electrolessly deposited over the electrically conductive layer and over the pads, and diffusion barrier layers are then simultaneously deposited over the nickel layers. Another method of forming semiconductor devices includes depositing backmetal (BM) layers on the electrically conductive layer including a titanium layer, a nickel layer, and/or a silver layer. The BM layers are covered with a protective coating and a nickel layer is electrolessly deposited over the pads. A diffusion barrier layer is deposited over the nickel layer over the pads, and the protective coating is removed.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method of forming a plurality of semiconductor devices, comprising: providing a semiconductor wafer having a first side and a second side opposite the first side, one or more electrically conductive pads coupled at the second side, and one or more electrically insulative layers coupled at the second side and having one or more openings providing access to the one or more electrically conductive pads; backgrinding the first side of the wafer to a desired thickness; depositing an electrically conductive layer on the first side of the wafer; simultaneously electrolessly depositing a first nickel layer over the electrically conductive layer and a second nickel layer over the one or more electrically conductive pads, and; simultaneously depositing a first diffusion barrier layer over the first nickel layer and a second diffusion barrier layer over the second nickel layer.
2. The method of claim 1 , wherein backgrinding the first side of the wafer comprises forming a substantially circular recess in the first side of the wafer bounded by a ring of non-removed material.
3. The method of claim 1 , wherein the first diffusion barrier layer and the second diffusion barrier layer each comprises one of electrolessly deposited gold and electrolessly deposited silver.
4. The method of claim 1 , wherein the first diffusion barrier layer and the second diffusion barrier layer each comprises an organic solderability preservative (OSP).
5. The method of claim 1 , wherein the one or more electrically insulative layers comprises polyimide.
6. The method of claim 1 , further comprising introducing dopants into the wafer through the first side of the wafer and annealing the wafer.
7. The method of claim 1 , wherein the electrically conductive layer comprises AlCu.
8. The method of claim 1 , further comprising forming one of a plurality of insulated gate bipolar transistors (IGBTs) and a plurality of diodes on the wafer.
9. A method of forming a plurality of semiconductor devices, comprising: providing a semiconductor wafer having a first side and a second side opposite the first side, one or more electrically conductive pads coupled at the second side, and one or more electrically insulative layers coupled at the second side and having one or more openings providing access to the one or more electrically conductive pads; backgrinding the first side of the wafer to a desired thickness; depositing an electrically conductive layer on the first side of the wafer; depositing one or more backmetal (BM) layers on the electrically conductive layer, the one or more BM layers comprising one of a titanium layer, a nickel layer, and a silver layer; covering the one or more BM layers with a protective coating; electrolessly depositing a nickel layer over the one or more electrically conductive pads; depositing a diffusion barrier layer over the nickel layer, and; removing the protective coating from the one or more BM layers.
10. The method of claim 9 , wherein the one or more BM layers comprises a titanium layer, a nickel layer, and a silver layer.
11. The method of claim 9 , wherein the diffusion barrier layer comprises one of electrolessly deposited gold, electrolessly deposited silver, and an organic solderability preservative (OSP).
12. The method of claim 9 , further comprising introducing dopants into the wafer through the first side of the wafer.
13. The method of claim 9 , wherein the electrically conductive layer comprises evaporated aluminum.
14. The method of claim 9 , wherein the protective coating comprises an adhesive tape.
15. The method of claim 9 , further comprising depositing the one or more BM layers through evaporation.
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June 30, 2016
May 2, 2017
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