A power semiconductor module arrangement includes a semiconductor module having a controllable power semiconductor component, a first printed circuit board (PCB) arranged outside the semiconductor module, and a control unit arranged outside the semiconductor module and having a second PCB. The control unit is configured to control the controllable power semiconductor component. The controllable power semiconductor component has a first load terminal and a second load terminal between which a load path of the power semiconductor component is formed, and also a control terminal for controlling the load path. The first PCB has a conductor track connected in series with the load path. The first and second PCBs are spaced apart from one another and electrically connected to one another by a pin.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A power semiconductor module arrangement, comprising: a semiconductor module having a controllable power semiconductor component comprising a first load terminal and a second load terminal between which a load path of the power semiconductor component is formed, and a control terminal for controlling the load path; a first printed circuit board arranged outside the semiconductor module and having a conductor track connected in series with the load path; and a control unit arranged outside the semiconductor module and configured to control the controllable power semiconductor component, the control unit comprising a second printed circuit board, wherein the first printed circuit board and the second printed circuit board are spaced apart from one another, wherein the first printed circuit board and the second printed circuit board are electrically connected to one another by a pin.
2. The power semiconductor module arrangement of claim 1 , wherein the pin is not electrically connected to the semiconductor module or is electrically connected to the semiconductor module only indirectly via the first printed circuit board and/or via the second printed circuit board.
3. The power semiconductor module arrangement of claim 1 , wherein the semiconductor module has a terminal of a first type which electrically connects the semiconductor module to the first printed circuit board.
4. The power semiconductor module arrangement of claim 3 , wherein the terminal of the first type is not electrically connected to the second printed circuit board or is electrically connected to the second printed circuit board only indirectly via the first printed circuit board and/or via the semiconductor module.
5. The power semiconductor module arrangement of claim 3 , wherein the terminal of the first type is a press-fit contact.
6. The power semiconductor module arrangement of claim 1 , wherein the semiconductor module comprises a terminal of a second type which electrically connects the semiconductor module to the second printed circuit board.
7. The power semiconductor module arrangement of claim 6 , wherein the terminal of the second type is not electrically connected to the first printed circuit board or is electrically connected to the first printed circuit board only indirectly via the second printed circuit board and/or via the semiconductor module.
8. The power semiconductor module arrangement of claim 6 , wherein the terminal of the second type is a press-fit contact.
9. The power semiconductor module arrangement of claim 1 , wherein the first printed circuit board is arranged between the semiconductor module and the second printed circuit board.
10. The power semiconductor module arrangement of claim 1 , wherein the second printed circuit board is arranged between the semiconductor module and the first printed circuit board.
11. The power semiconductor module arrangement of claim 10 , wherein the semiconductor module comprises a housing having a depression, and wherein the first printed circuit board extends across the depression and/or the second printed circuit board is arranged in the depression.
12. The power semiconductor module arrangement of claim 1 , wherein the first printed circuit board is populated with a capacitor or with a plurality of capacitors which are electrically connected in parallel by conductor tracks of the first printed circuit board.
13. The power semiconductor module arrangement of claim 1 , wherein the first printed circuit board and the second printed circuit board are arranged parallel to one another.
14. The power semiconductor module arrangement of claim 1 , wherein the control unit comprises a first input and a second input, wherein a section of a conductor track of the first printed circuit board is electrically connected between the first input and the second input.
15. The power semiconductor module arrangement of claim 14 , wherein a series connection, in which the section of the conductor track is connected in series with an electrical connection between the first printed circuit board and the second printed circuit board, is electrically connected between the first input and the second input.
16. The power semiconductor module arrangement of claim 15 , wherein the electrical connection is a plug and/or press-fit connection.
17. The power semiconductor module arrangement of claim 1 , wherein the semiconductor module comprises: a plurality of first terminal pins which project from a module housing at a top side and which each have a first contact end in electrical contact with the first printed circuit board; and a plurality of second terminal pins which project from the module housing at the top side and which each have a second contact end in electrical contact with the second printed circuit board; wherein the first contact ends and the second contact ends extend away from the top side and the module housing in one direction such that the second contact ends project beyond the first contact ends.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
January 25, 2016
May 23, 2017
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