Patentable/Patents/US-9673308
US-9673308

Semiconductor device manufacturing method

PublishedJune 6, 2017
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

According to the present invention, since the buffer layer is formed by multiple ion implantations of different acceleration energies and the non-diffusion region in which impurity do not diffuse is left between the buffer layer and the collector layer, the semiconductor device which can supply sufficient holes to the drift layer at the turn-off can be manufactured while the withstand voltage is ensured.

Patent Claims
6 claims

Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.

Claim 1

Original Legal Text

1. A semiconductor device manufacturing method comprising: a first step in which, on a first main surface and a second main surface, which is a surface opposite to the first main surface of a semiconductor substrate, phosphorous is implanted in the second main surface by using multiple ion implantations of different acceleration energies so as to form a first impurity region on the semiconductor substrate; a second step in which a second conductivity-type impurity is implanted in the second main surface using an acceleration energy lower than the multiple ion implantations, and a second impurity region is formed so that a non-implantation region in which the impurity is not implanted is left between that and the first impurity region in the semiconductor substrate; a heat treatment step in which heat treatment is applied to the semiconductor substrate so that a buffer layer is formed by the phosphorous, a collector layer is formed by the second conductivity-type impurity, and a non-diffusion region in which the phosphorous and the second conductivity-type impurity do not diffuse is left between the buffer layer and the collector layer; and a step in which a collector electrode in contact with the collector layer is formed.

Plain English Translation

A method for manufacturing a semiconductor device involves implanting phosphorous ions into one side of a semiconductor substrate (the second main surface) using multiple implantations with different energy levels. This creates a first impurity region. Next, a second type of impurity is implanted into the same side, but at a lower energy, forming a second impurity region. Crucially, the second implantation is designed to leave a region between the first and second impurity regions that isn't implanted. Then, the substrate is heat treated, which causes the phosphorous to form a buffer layer, and the second impurity to form a collector layer. A key feature is that a region where neither impurity diffuses is left between the buffer and collector layers. Finally, a collector electrode is created that makes contact with the collector layer.

Claim 2

Original Legal Text

2. The semiconductor device manufacturing method according to claim 1 , wherein the phosphorous is implanted in the second main surface at the acceleration energy of 1 to 10 MeV; and the second conductivity-type impurity is implanted in the second main surface at the acceleration energy of 5 to 100 KeV.

Plain English Translation

In the semiconductor device manufacturing method where phosphorous is implanted into one side of a semiconductor substrate (the second main surface) using multiple implantations with different energy levels to create a first impurity region; a second type of impurity is implanted into the same side, but at a lower energy, forming a second impurity region leaving an unimplanted region between the two; the substrate is then heat treated to form a phosphorous buffer layer and a collector layer from the second impurity, and a collector electrode is made that contacts the collector layer, the phosphorous implantation uses energies between 1 and 10 MeV. The second impurity implantation uses energies between 5 and 100 KeV.

Claim 3

Original Legal Text

3. The semiconductor device manufacturing method according to claim 1 , wherein dosages of the multiple ion implantations are uniform.

Plain English Translation

In the semiconductor device manufacturing method where phosphorous is implanted into one side of a semiconductor substrate (the second main surface) using multiple implantations with different energy levels to create a first impurity region; a second type of impurity is implanted into the same side, but at a lower energy, forming a second impurity region leaving an unimplanted region between the two; the substrate is then heat treated to form a phosphorous buffer layer and a collector layer from the second impurity, and a collector electrode is made that contacts the collector layer, the different ion implantations for the phosphorous have uniform dosages.

Claim 4

Original Legal Text

4. A semiconductor device manufacturing method comprising: a first step in which, on a first main surface and a second main surface, which is a surface opposite to the first main surface of a semiconductor substrate, a first conductivity-type impurity is implanted in the second main surface by using multiple ion implantations of different acceleration energies so as to form a first impurity region on the semiconductor substrate; a second step in which a second conductivity-type impurity is implanted in the second main surface using an acceleration energy lower than the multiple ion implantations, and a second impurity region is formed so that a non-implantation region in which the impurity is not implanted is left between that and the first impurity region in the semiconductor substrate; a heat treatment step in which a heat treatment is applied to the semiconductor substrate so that a buffer layer is formed by the first conductivity-type impurity, a collector layer is formed by the second conductivity-type impurity, and a non-diffusion region in which the first conductivity-type impurity and the second conductivity-type impurity do not diffuse is left between the buffer layer and the collector layer; and a step in which a collector electrode in contact with the collector layer is formed, wherein the multiple ion implantations are performed so that the dosage of the first conductivity-type impurity becomes larger as going closer to the second main surface side, and the impurity concentration profile of the buffer layer has only a single peak.

Plain English Translation

A method for manufacturing a semiconductor device involves implanting a first conductivity-type impurity into one side of a semiconductor substrate (the second main surface) using multiple implantations with different energy levels. This creates a first impurity region. Next, a second conductivity-type impurity is implanted into the same side, but at a lower energy, forming a second impurity region. Crucially, the second implantation is designed to leave a region between the first and second impurity regions that isn't implanted. Then, the substrate is heat treated, which causes the first impurity to form a buffer layer, and the second impurity to form a collector layer. A key feature is that a region where neither impurity diffuses is left between the buffer and collector layers. Finally, a collector electrode is created that makes contact with the collector layer. The multiple ion implantations are performed in such a way that the concentration of the first conductivity impurity increases closer to the implanted surface, resulting in a buffer layer with a single peak impurity concentration.

Claim 5

Original Legal Text

5. The semiconductor device manufacturing method according to claim 4 , wherein in the first step, the first conductivity-type impurity is implanted perpendicularly to the second main surface.

Plain English Translation

In the semiconductor device manufacturing method where a first conductivity-type impurity is implanted into one side of a semiconductor substrate (the second main surface) using multiple implantations with different energy levels to create a first impurity region; a second conductivity-type impurity is implanted into the same side, but at a lower energy, forming a second impurity region leaving an unimplanted region between the two; the substrate is then heat treated to form a buffer layer from the first impurity and a collector layer from the second impurity, and a collector electrode is made that contacts the collector layer, where the multiple ion implantations result in an impurity concentration that increases towards the implanted surface with a single concentration peak, the first impurity type is implanted perpendicularly to the implanted surface.

Claim 6

Original Legal Text

6. A semiconductor device manufacturing method comprising: a first step in which, on a first main surface and a second main surface, which is a surface opposite to the first main surface of a semiconductor substrate, a first conductivity-type impurity is implanted in the second main surface by using multiple ion implantations of different acceleration energies so as to form a first impurity region on the semiconductor substrate; a second step in which a second conductivity-type impurity is implanted in the second main surface using an acceleration energy lower than the multiple ion implantations, and a second impurity region is formed so that a non-implantation region, in which the impurity is not implanted, is left between that the first impurity region in the semiconductor substrate; a single heat treatment step in which a heat treatment is applied to the semiconductor substrate to form a buffer layer by the first conductivity-type impurity, a collector layer by the second conductivity-type impurity, and a non-diffusion region in which the first conductivity-type impurity and the second conductivity-type impurity do not diffuse is left between the buffer layer and the collector layer, and a step in which a collector electrode in contact with the collector layer is formed.

Plain English Translation

A method for manufacturing a semiconductor device involves implanting a first conductivity-type impurity into one side of a semiconductor substrate (the second main surface) using multiple implantations with different energy levels. This creates a first impurity region. Next, a second conductivity-type impurity is implanted into the same side, but at a lower energy, forming a second impurity region. Crucially, the second implantation is designed to leave a region between the first and second impurity regions that isn't implanted. Then, a *single* heat treatment step is applied. This heat treatment forms both the buffer layer (from the first impurity), and the collector layer (from the second impurity). A key feature is that a region where neither impurity diffuses is left between the buffer and collector layers. Finally, a collector electrode is created that makes contact with the collector layer.

Classification Codes (CPC)

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Patent Metadata

Filing Date

December 13, 2013

Publication Date

June 6, 2017

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