A display device having at least a plurality of pixel circuits, connected to signal lines to which data signals in accordance with luminance information are supplied, arranged in a matrix, wherein pixel circuits of odd number columns and even number columns adjacent sandwiching an axis in a column direction parallel to an arrangement direction of the signal lines have a mirror type circuit arrangement symmetric about the axis of the column direction, and there are lines different from the signal lines between signal lines of adjacent pixel circuits.
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1. A display device comprising: a plurality of pixel circuits arranged in a matrix, the matrix including first, second and third columns respectively including columns of the pixel circuits extending along a column direction; signal lines for supplying data signals; precharge potential lines arranged in the column direction; power supply potential lines arranged in the column direction, wherein one of the power supply potential lines is shared by pixel circuits in the first and second columns, wherein one of the precharge potential lines is shared by pixel circuits in the second and third columns, wherein the second column is adjacent to the first column, the second column is adjacent to the third column, and the second column is between the first column and the third column, wherein the one of the power supply potential lines is located between the first column and the second column, but none of the precharge potential lines are located between the first column and the second column, wherein the one of the precharge potential lines is located between the second column and the third column, but none of the power supply potential lines are located between the second column and the third column, and wherein transistors of a first pixel circuit in the first column and transistors of a second pixel circuit in the second column are arranged in a symmetrical manner with respect to an axis along the column direction.
The display device has pixel circuits arranged in a matrix with columns. Data signals are supplied via signal lines. Precharge and power supply potential lines run along the columns. Power supply lines are shared between the first and second columns of pixels. Precharge lines are shared between the second and third columns of pixels. The first, second, and third columns are adjacent. The power supply line is between the first and second column, but no precharge line is. The precharge line is between the second and third columns, but no power supply line is. Transistors in the first and second columns are arranged symmetrically about a column axis.
2. A display device as set forth in claim 1 , wherein the signal lines are arranged in the column direction such that two of the signal lines are located between the second column and the third column and none of the signal lines are located between the first column and the second column, and wherein the one of the precharge potential lines is arranged between the two of the signal lines with no other lines therebetween, the two of the signal lines being connected to the pixel circuits of the second column and the third column, respectively.
In the display device with pixel circuits arranged in a matrix with columns, data signals supplied via signal lines, shared power supply and precharge lines running along the columns (as described in claim 1), signal lines are arranged such that two signal lines are located between the second and third columns, but no signal lines are between the first and second columns. A precharge line is between the two signal lines connected to the second and third columns without any other lines in between.
3. A display device as set forth in claim 1 , wherein pixel circuits of odd number columns and even number columns adjacent to each other and sandwiching an axis in the column direction therebetween have a mirror type circuit arrangement symmetric with respect to the axis in the column direction.
In the display device with pixel circuits arranged in a matrix with columns, data signals supplied via signal lines, shared power supply and precharge lines running along the columns (as described in claim 1), pixel circuits in adjacent odd and even numbered columns have a mirror-symmetric layout with respect to the column axis between them.
4. A display device as set forth in claim 1 , wherein at least one of the plurality of pixel circuits comprises: a sampling transistor which samples the data signal; a capacitor which stores a voltage based on the data signal; a light emitting element which emits light in accordance with the voltage stored in the capacitor; a driving transistor which supplies current to the light emitting element; a potential supply transistor which supplies a precharge potential voltage to a node of the capacitor.
In the display device with pixel circuits arranged in a matrix with columns, data signals supplied via signal lines, shared power supply and precharge lines running along the columns (as described in claim 1), each pixel circuit includes a sampling transistor that samples the data signal, a capacitor to store the sampled voltage, a light-emitting element (e.g. OLED) that emits light based on the stored voltage, a driving transistor supplying current to the light-emitting element, and a potential supply transistor supplying a precharge voltage to the capacitor's node.
5. A display device as set forth in claim 4 , wherein a first current electrode of the potential supply transistor is connected directly to the capacitor.
In the display device with pixel circuits containing a sampling transistor, a capacitor, a light emitting element, a driving transistor, and a precharge transistor (as described in claim 4), the potential supply transistor connects DIRECTLY to the capacitor via its first current electrode.
6. A display device as set forth in claim 4 , further comprising: gate lines and auto zero lines, wherein a gate electrode of the sampling transistor is connected to one of the gate lines, and a gate electrode of the potential supply transistor is connected to one of the auto zero lines.
In the display device with pixel circuits containing a sampling transistor, a capacitor, a light emitting element, a driving transistor, and a precharge transistor (as described in claim 4), gate lines and auto-zero lines are added. The sampling transistor's gate is connected to a gate line, and the potential supply transistor's gate is connected to an auto-zero line.
7. A display device as set forth in claim 4 , wherein the gate lines and the auto zero lines are arranged in a row direction.
In the display device with pixel circuits containing a sampling transistor, a capacitor, a light emitting element, a driving transistor, and a precharge transistor (as described in claim 4), the gate lines and auto-zero lines run along the row direction of the display.
8. A display device as set forth in claim 4 , wherein said at least one of the plurality of pixel circuits further comprises: a first switch transistor connected between the driving transistor and the light emitting element, wherein one of the source and drain electrodes of the first switch transistor is connected to one of the source and drain electrodes of the driving transistor through a first node, and an other one of the source and drain electrodes of the first switch transistor is connected to the light emitting element; a second switch transistor connected between one end of the capacitor and the first node, wherein one of the source and drain electrodes of the second switch transistor is connected to the capacitor and an other one of the source and drain electrodes of the second switch transistor is connected to the first node.
In the display device with pixel circuits containing a sampling transistor, a capacitor, a light emitting element, a driving transistor, and a precharge transistor (as described in claim 4), a first switch transistor is between the driving transistor and the light-emitting element, connected at a first node. A second switch transistor connects between one end of the capacitor and this first node.
9. A display device as set forth in claim 4 , wherein at least the driving transistor is configured by p-channel TFT.
In the display device with pixel circuits containing a sampling transistor, a capacitor, a light emitting element, a driving transistor, and a precharge transistor (as described in claim 4), at least the driving transistor is a p-channel TFT (thin-film transistor).
10. A display device as set forth in claim 8 , wherein the sampling transistor, the driving transistor, the potential supply transistor, the first switch transistor and the second switch transistor are configured by p-channel TFTs.
In the display device with pixel circuits containing a sampling transistor, a capacitor, a light emitting element, a driving transistor, a precharge transistor, a first switch transistor between the driving transistor and light emitting element, and a second switch transistor connected to the capacitor and first node (as described in claim 8), the sampling, driving, potential supply, first switch, and second switch transistors are all p-channel TFTs (thin-film transistors).
11. A display device as set forth in claim 1 , further comprising control circuitry configured to perform an offset cancellation function for each of the plurality of pixel circuits, whereby variation of luminance caused by differences in threshold voltages of drive transistors is canceled.
The display device with pixel circuits arranged in a matrix with columns, data signals supplied via signal lines, shared power supply and precharge lines running along the columns (as described in claim 1), includes control circuitry. This circuitry performs offset cancellation for each pixel to compensate for variations in the driving transistors' threshold voltages, reducing luminance differences.
12. A display device as set forth in claim 11 , wherein the control circuitry is configured to perform the offset cancellation function for those of the plurality of pixels that are connected to the one of the precharge lines simultaneously.
In the display device containing control circuitry configured to perform an offset cancellation function (as described in claim 11), the offset cancellation function is applied simultaneously to all pixels connected to the same precharge line.
13. A display device as set forth in claim 1 , wherein the two ends of each of the power supply potential lines are all connected to each other by a current path other than the power supply potential lines so as to become common and made the same potential.
In the display device with pixel circuits arranged in a matrix with columns, data signals supplied via signal lines, shared power supply and precharge lines running along the columns (as described in claim 1), the power supply potential lines are connected to each other at their ends via a current path other than the power supply lines themselves, ensuring they are at the same potential.
14. A display device as set forth in claim 2 , further comprising control circuitry configured to sequentially write the data signal from the signal lines into two of the pixel circuits, the two pixel circuits being adjacent to each other in the same row and sharing a precharge potential line, such that: the data signal is written into only one of the two of the pixel circuits at a time; the writing of the data signal into both of the two of the pixel circuits is performed while the precharge potential line shared by the two of the pixel circuits is supplying a precharge potential; and crosstalk between signal lines connected to the two of the pixel circuits is prevented.
In the display device with pixel circuits arranged in a matrix with columns, data signals supplied via signal lines, and shared power supply and precharge lines running along the columns where two signal lines are located between the second and third columns, but no signal lines are between the first and second columns, and a precharge line is between the two signal lines connected to the second and third columns without any other lines in between (as described in claim 2), control circuitry sequentially writes data to two adjacent pixels in the same row sharing a precharge line. Data is written to only one pixel at a time, and the precharge line supplies a precharge potential during writing to both pixels, preventing crosstalk between signal lines.
15. A display device as set forth in claim 1 , wherein the display device is an organic electroluminescence image display device.
The display device with pixel circuits arranged in a matrix with columns, data signals supplied via signal lines, shared power supply and precharge lines running along the columns (as described in claim 1), is an organic electroluminescence (OLED) image display.
16. A display device as set forth in claim 4 , wherein the display device is an organic electroluminescence image display device and wherein the light emitting element is an organic electroluminescence element.
This invention relates to an organic electroluminescence (OLED) image display device incorporating an organic electroluminescence (OLED) element as the light-emitting component. The device addresses challenges in display technology, particularly in achieving efficient light emission and improved image quality in OLED-based displays. The OLED element is designed to emit light when an electric current is applied, enabling the display to produce high-resolution images with vibrant colors and deep blacks. The device leverages the self-emissive nature of OLEDs, eliminating the need for a backlight, which enhances energy efficiency and reduces overall thickness. The OLED element is structured to optimize electron and hole injection, recombination, and light extraction, ensuring uniform brightness and long operational lifespan. The display may include additional layers or components to enhance performance, such as encapsulation layers to protect the OLED from moisture and oxygen, and conductive layers to facilitate efficient charge transport. The invention aims to provide a high-performance, durable, and energy-efficient display solution suitable for various applications, including televisions, smartphones, and digital signage.
17. A display device comprising: a plurality of pixel circuits arranged in a matrix having rows and columns; a plurality of signal lines for supplying data signals; a plurality of precharge potential lines arranged between adjacent columns of the pixel circuits; a plurality of power supply potential lines arranged between adjacent columns of the pixel circuits, wherein the plurality of precharge potential lines and the plurality of power supply potential lines are arranged such that, for each pair of adjacent columns of the plurality of pixel circuits, either one of the plurality of the precharge potential lines or one of the plurality of the power supply potential lines, but not both, is disposed between the adjacent columns thereof, and wherein, for each pair of adjacent columns of the plurality of pixel circuits, those of the plurality of pixel circuits in the adjacent columns share in common the one of the plurality of precharge potential lines and the plurality of power supply potential lines disposed therebetween, and wherein transistors of a first pixel circuit in a first column and transistors of a second pixel circuit in a second column are arranged in a symmetrical manner with respect to an axis along the column direction.
The display device has pixel circuits arranged in a matrix. Data signals are supplied by signal lines. Precharge and power supply potential lines are located between adjacent columns of pixels. For each pair of adjacent columns, either a precharge line or a power supply line is present, but not both. The pixels in adjacent columns share the single precharge or power supply line between them. Transistors in the first and second columns are arranged symmetrically about a column axis.
18. A display device as set forth in claim 17 , wherein the plurality of signal lines are arranged such that, for each pair of adjacent columns of the plurality of pixel circuits that has a precharge potential line disposed between the adjacent columns thereof, two of the plurality of signal lines are also disposed between the adjacent columns thereof, with the precharge potential line being disposed between the two of the plurality of signal lines with no other lines therebetween, each of the plurality of signal lines being connected to an adjacent column of pixel circuits.
The display device with pixel circuits arranged in a matrix, signal lines supplying data signals, precharge and power supply lines located between adjacent columns of pixels (as described in claim 17), arranges signal lines such that, where a precharge line exists between two columns, two signal lines are also between those columns, with the precharge line situated between the two signal lines and no other lines in between. Each signal line connects to one of the adjacent columns.
19. A display device as set forth in claim 18 , further comprising: control circuitry configured to sequentially write the data signal from the signal lines into two pixel circuits of the plurality of pixel circuits, the two pixel circuits being adjacent to each other in the same row and sharing a precharge potential line, such that: the data signal is written into only one of the two pixel circuits at a time; the writing of the data signal into both of the two pixel circuits is performed while the precharge potential line shared by the two pixel circuits is supplying a precharge potential; and crosstalk between signal lines connected to the two pixel circuits is prevented.
In the display device with pixel circuits arranged in a matrix, signal lines supplying data signals, precharge and power supply lines located between adjacent columns of pixels, and where a precharge line exists between two columns, two signal lines are also between those columns, with the precharge line situated between the two signal lines and no other lines in between (as described in claim 18), control circuitry sequentially writes data to two adjacent pixels in the same row sharing a precharge line. Data is written to only one pixel at a time, and the precharge line supplies a precharge potential during writing to both pixels, preventing crosstalk between signal lines.
20. A display device comprising: a plurality of pixel circuits arranged in a matrix having rows and columns; a plurality of signal lines for supplying data signals; a plurality of precharge potential lines arranged between adjacent columns of the pixel circuits; a plurality of power supply potential lines arranged between adjacent columns of the pixel circuits, wherein the plurality of precharge potential lines and the plurality of power supply potential lines are alternately disposed between columns of the plurality of pixel circuits such that no adjacent columns of the pixel circuits have both one of the precharge potential lines and one of the power supply potential lines disposed therebetween, and wherein, for each pair of adjacent columns of the pixel circuits, those of the pixel circuits in the adjacent columns share in common the one of the precharge potential lines and the power supply potential lines disposed therebetween, and wherein transistors of a first pixel circuit in a first column and transistors of a second pixel circuit in a second column are arranged in a symmetrical manner with respect to an axis along the column direction.
The display device has pixel circuits in a matrix. Signal lines supply data. Precharge and power supply lines are located between columns, alternating such that no adjacent pixel columns have both a precharge and power supply line between them. Adjacent columns share the precharge or power supply line between them. Transistors in the first and second columns are arranged symmetrically about a column axis.
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September 30, 2016
July 18, 2017
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