An array substrate manufacturing method, an array substrate formed by the method, and a liquid crystal apparatus are disclosed. The method includes steps of depositing a first metal layer to form a plurality of scanning lines; depositing a first insulating layer and performing a patterning process on the first insulating layer; depositing a semiconductor layer and a second metal layer to form a plurality of data lines and thin-film transistors; depositing a second insulating layer to form a plurality of contact holes; and depositing a transparent layer to form a plurality of pixel electrodes.
Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. An array substrate being mounted in a corresponding liquid crystal display panel, comprising: a plurality of scanning lines for transmitting scanning signals; a plurality of data lines for transmitting data signals; a plurality of thin-film transistors for transmitting the data signals to a plurality of pixel electrodes, respectively, according to the scanning signals so as to display images represented by the data signals; a first insulating layer disposed between the thin-film transistors and the scanning lines; and a second insulating layer disposed between the pixel electrodes and the thin-film transistors; wherein the first insulating layer has a thickness at two sides thereof relatively greater than that at a middle thereof, wherein the first insulating layer has a substantially quadrilateral outline in cross section; and the quadrilateral outline has a curved side which is concave-shaped.
An array substrate is part of a liquid crystal display panel. It has several parallel scanning lines that carry scanning signals and several parallel data lines that carry data signals. Thin-film transistors (TFTs) control the voltage applied to individual pixel electrodes based on these signals, displaying images. An insulating layer separates the TFTs from the scanning lines. Another insulating layer separates the pixel electrodes from the TFTs. The first insulating layer is thicker on the sides than in the middle. The cross-section of this first insulating layer looks like a quadrilateral with one curved side that is concave.
2. The array substrate as claimed in claim 1 , wherein each one of the thin-film transistors includes a source electrode, a drain electrode and a gate electrode; a channel is formed between the source electrode and the drain electrode; the source electrode is connected to a corresponding data line; the gate electrode is connected to a corresponding scan line; and the drain electrode is connected to a corresponding pixel electrode.
The array substrate described previously uses thin-film transistors (TFTs). Each TFT has a source, drain, and gate electrode. A channel exists between the source and drain. The source connects to a data line, and the gate connects to a scanning line. The drain electrode connects to a pixel electrode. So, the data signal from the data line, controlled by the scanning line signal, is passed through the TFT to the pixel electrode.
3. The array substrate as claimed in claim 2 , wherein the source electrode is connected to the channel through an ohmic contact layer.
The array substrate, using thin-film transistors (TFTs) with source, drain, and gate electrodes, where the source connects to a data line and the gate to a scanning line, has a source electrode connected to the channel of the TFT through an "ohmic contact layer." This ohmic contact layer reduces the resistance of the connection between the source electrode and the transistor channel, allowing for a more efficient transfer of electrical signals.
4. The array substrate as claimed in claim 2 , wherein the drain electrode is connected to the channel through an ohmic contact layer.
The array substrate, using thin-film transistors (TFTs) with source, drain, and gate electrodes, where the source connects to a data line and the gate to a scanning line, has a drain electrode connected to the channel of the TFT through an "ohmic contact layer." This ohmic contact layer reduces the resistance of the connection between the drain electrode and the transistor channel, allowing for a more efficient transfer of electrical signals to the pixel electrode.
5. A liquid crystal display apparatus comprising a liquid crystal panel having a color filter substrate and an array substrate, wherein the array substrate has: a plurality of scanning lines for transmitting scanning signals; a plurality of data lines for transmitting data signals; a plurality of thin-film transistors for transmitting the data signals to a plurality of pixel electrodes, respectively, according to the scanning signals so as to display images represented by the data signals; a first insulating layer disposed between the thin-film transistors and the scanning lines; and a second insulating layer disposed between the pixel electrodes and the thin-film transistors; wherein the first insulating layer has a thickness at two sides thereof relatively greater than that at a middle thereof, wherein the first insulating layer has a substantially quadrilateral outline in cross section; and the quadrilateral outline has a curved side which is concave-shaped.
A liquid crystal display (LCD) apparatus includes a liquid crystal panel, which has a color filter substrate and an array substrate. The array substrate has parallel scanning lines for scanning signals and parallel data lines for data signals. Thin-film transistors (TFTs) control pixel electrodes according to these signals to display images. An insulating layer separates the TFTs from the scanning lines. Another insulating layer separates the pixel electrodes from the TFTs. The first insulating layer is thicker on the sides than in the middle and is shaped like a quadrilateral with a curved concave side in cross-section.
6. The liquid crystal display apparatus as claimed in claim 5 , wherein each one of the thin-film transistors includes a source electrode, a drain electrode and a gate electrode; a channel is formed between the source electrode and the drain electrode; the source electrode is connected to a corresponding data line; the gate electrode is connected to a corresponding scan line; and the drain electrode is connected to a corresponding pixel electrode.
The liquid crystal display (LCD) described previously includes an array substrate that uses thin-film transistors (TFTs). Each TFT has a source, drain, and gate electrode. A channel exists between the source and drain. The source connects to a data line, and the gate connects to a scanning line. The drain electrode connects to a pixel electrode. So, the data signal from the data line, controlled by the scanning line signal, is passed through the TFT to the pixel electrode.
7. The liquid crystal display apparatus as claimed in claim 6 , wherein the source electrode is connected to the channel through an ohmic contact layer.
The liquid crystal display (LCD), using an array substrate with thin-film transistors (TFTs) that have source, drain, and gate electrodes (where the source connects to a data line and the gate to a scanning line), has a source electrode connected to the TFT channel through an "ohmic contact layer." This ohmic contact layer reduces the resistance of the connection between the source electrode and the transistor channel, allowing for a more efficient transfer of electrical signals.
8. The liquid crystal display apparatus as claimed in claim 6 , wherein the drain electrode is connected to the channel through an ohmic contact layer.
The liquid crystal display (LCD), using an array substrate with thin-film transistors (TFTs) that have source, drain, and gate electrodes (where the source connects to a data line and the gate to a scanning line), has a drain electrode connected to the TFT channel through an "ohmic contact layer." This ohmic contact layer reduces the resistance of the connection between the drain electrode and the transistor channel, allowing for a more efficient transfer of electrical signals to the pixel electrode.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 11, 2014
August 15, 2017
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