A semiconductor package includes a substrate having a groove in an upper surface. A semiconductor device is mounted on the substrate to cover one portion of the groove and leaving another portion exposed.
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1. A semiconductor package comprising: a substrate having at least one groove formed in a solder resist layer on a top surface of the substrate to expose an underlying printed circuit board; and a semiconductor device mounted on the substrate, wherein the at least one groove includes long and short sides and has a shape including a first region and second region that are connected to each other, wherein the first region is covered by the semiconductor device and the second region is uncovered by the semiconductor device, wherein one of the short sides is included in the first region and one of the short sides is included in the second region and an underfill material fills the groove.
A semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath. A semiconductor device is mounted on the substrate, covering part of the groove while leaving another part exposed. The groove, which has long and short sides, consists of a covered region and an uncovered region connected to each other. One short side is in the covered region, and the other short side is in the uncovered region. Underfill material fills the entire groove.
2. The semiconductor package of claim 1 , further comprising: an underfill material layer filling the first region and the second region and formed between the substrate and the semiconductor device.
The semiconductor package includes an underfill material layer that fills both the covered and uncovered regions of the groove and is located between the substrate and the semiconductor device. This underfill material provides mechanical support and improves thermal conductivity. This builds upon the package having a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
3. The semiconductor package of claim 2 , wherein the underfill material layer is fully filled between the substrate and the semiconductor device.
The underfill material layer completely fills the space between the substrate and the semiconductor device. This ensures maximum adhesion and thermal transfer between the components. The package includes an underfill material layer that fills both the covered and uncovered regions of the groove and is located between the substrate and the semiconductor device. This builds upon the package having a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
4. The semiconductor package of claim 2 , wherein the underfill material layer comprises: a plurality of underfill members spaced apart from each other, wherein a plurality of grooves are respectively filled by the plurality of underfill members.
The underfill material layer is comprised of multiple individual underfill sections, spaced apart from each other, where each groove is filled by one of these sections. This arrangement may provide greater flexibility or allow for easier manufacturing. The package includes an underfill material layer that fills both the covered and uncovered regions of the groove and is located between the substrate and the semiconductor device. This builds upon the package having a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
5. The semiconductor package of claim 1 , wherein the at least one groove comprises two first sides divided into the first region and the second region and two second sides, each included in one of the first region and the second region, wherein the first sides are longer than the second sides.
The groove has two longer sides that are divided into covered and uncovered portions and two shorter sides, each located entirely within either the covered or uncovered portion. The longer sides are longer than the shorter sides. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
6. The semiconductor package of claim 5 , wherein one of the two second sides is in the second region and the other one is in the first region.
One of the shorter sides of the groove is located in the uncovered region, while the other shorter side is located in the covered region. The groove has two longer sides that are divided into covered and uncovered portions and two shorter sides, each located entirely within either the covered or uncovered portion. The longer sides are longer than the shorter sides. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
7. The semiconductor package of claim 5 , wherein the two second sides are parallel to each other in the second region.
The two shorter sides of the groove are parallel to each other in the uncovered region. This facilitates underfill flow or simplifies manufacturing. The groove has two longer sides that are divided into covered and uncovered portions and two shorter sides, each located entirely within either the covered or uncovered portion. The longer sides are longer than the shorter sides. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
8. The semiconductor package of claim 5 , wherein the second sides are equal to or less than one half a length of the first sides.
The length of the shorter sides of the groove is equal to or less than one-half the length of the longer sides. This ensures that the groove has a sufficient length for underfill flow while maintaining structural integrity. The groove has two longer sides that are divided into covered and uncovered portions and two shorter sides, each located entirely within either the covered or uncovered portion. The longer sides are longer than the shorter sides. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
9. The semiconductor package of claim 5 , wherein the two first sides are not parallel to each other.
The two longer sides of the groove are not parallel to each other. This creates a varying width in the groove, which could affect underfill flow characteristics. The groove has two longer sides that are divided into covered and uncovered portions and two shorter sides, each located entirely within either the covered or uncovered portion. The longer sides are longer than the shorter sides. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
10. The semiconductor package of claim 5 , wherein a space between the two first sides tapers from the second region to the first region.
The space between the two longer sides of the groove decreases in width from the uncovered region towards the covered region. This tapered shape facilitates the capillary flow of underfill material. The groove has two longer sides that are divided into covered and uncovered portions and two shorter sides, each located entirely within either the covered or uncovered portion. The longer sides are longer than the shorter sides. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
11. The semiconductor package of claim 1 , wherein lower or side surfaces of the groove are inclined.
The lower or side surfaces of the groove are inclined (sloped). This facilitates the flow of underfill material into and throughout the groove. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
12. The semiconductor package of claim 11 , wherein the lower surfaces of the groove are deeper in the second region than in the first region.
The lower surfaces of the groove are deeper in the uncovered region than in the covered region. This creates a varying depth to the groove, which can influence underfill flow characteristics. The side surfaces of the groove are inclined (sloped). The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
13. The semiconductor package of claim 1 , wherein the substrate comprises a wiring layer and a solder resist layer, wherein the groove are formed by etching a part of the solder resist layer.
The substrate includes a wiring layer and a solder resist layer. The groove is formed by selectively removing a portion of the solder resist layer, exposing the wiring layer underneath. The semiconductor package has a substrate with a groove etched into the solder resist layer on its top surface, exposing the printed circuit board underneath; a semiconductor device mounted on the substrate, covering part of the groove while leaving another part exposed; the groove, which has long and short sides, consisting of a covered region and an uncovered region connected to each other with one short side in each region; and underfill material filling the groove.
14. A semiconductor package comprising: a substrate having at least one groove in an upper surface, the groove including long sides and short sides; a semiconductor device mounted on the substrate and exposing a portion of the groove and covering the remaining portion of the groove, with one short side of the groove covered by the semiconductor device and another short side of the groove exposed; and an underfill material layer filling the exposed portion and the remaining portion of the groove and formed between the substrate and the semiconductor device.
A semiconductor package consists of a substrate with at least one groove on its top surface, the groove having long and short sides. A semiconductor device is mounted on the substrate such that a portion of the groove is exposed, while the remaining portion is covered. One short side of the groove is covered by the device and the other is exposed. An underfill material fills both the exposed and covered portions of the groove and is formed between the substrate and the semiconductor device to provide mechanical support and improve reliability.
15. The semiconductor package of claim 14 , wherein a part of the underfill material layer that fills the exposed portion and the remaining portion of the groove and another part formed between the substrate and the semiconductor device are integrally formed with each other.
A part of the underfill material fills both the exposed and covered portions of the groove and another part is formed between the substrate and the semiconductor device are joined together as one single piece of material. This integrated structure enhances the mechanical integrity of the package. The package includes a substrate with at least one groove on its top surface, the groove having long and short sides. A semiconductor device is mounted on the substrate such that a portion of the groove is exposed, while the remaining portion is covered, with one short side of the groove covered by the semiconductor device and another short side of the groove exposed. An underfill material fills both the exposed and covered portions of the groove and is formed between the substrate and the semiconductor device.
16. A semiconductor package, comprising: a substrate including a printed circuit board and a solder resist layer coated on a top surface thereof; a groove including two short sides and two longs sides formed in the solder resist layer to enhance flow of underfill material with which the groove is filled under a semiconductor device; and a semiconductor device mounted on the top surface of the substrate, leaving a portion of the groove exposed.
A semiconductor package has a substrate that includes a printed circuit board and a solder resist layer coated on its top surface. A groove, having two short sides and two long sides, is created in the solder resist layer to improve the flow of underfill material beneath the semiconductor device. The semiconductor device is then mounted on the substrate's top surface, but a portion of the groove remains exposed, allowing for visual inspection or further underfill processing.
17. The semiconductor package of claim 16 , further comprising an underfill material between the semiconductor device and substrate and at least partially filling the groove.
The semiconductor package includes an underfill material placed between the semiconductor device and the substrate that fills at least a portion of the groove. This adds mechanical support and thermal dissipation. The package has a substrate that includes a printed circuit board and a solder resist layer coated on its top surface. A groove, having two short sides and two long sides, is created in the solder resist layer to improve the flow of underfill material beneath the semiconductor device. The semiconductor device is then mounted on the substrate's top surface, but a portion of the groove remains exposed.
18. The semiconductor package of claim 17 , wherein the semiconductor device includes a second semiconductor package.
The semiconductor device mounted on the substrate is itself a second-level semiconductor package, such as a chip-scale package (CSP) or a ball grid array (BGA) component. The package includes an underfill material placed between the semiconductor device and the substrate that fills at least a portion of the groove. The package has a substrate that includes a printed circuit board and a solder resist layer coated on its top surface. A groove, having two short sides and two long sides, is created in the solder resist layer to improve the flow of underfill material beneath the semiconductor device. The semiconductor device is then mounted on the substrate's top surface, but a portion of the groove remains exposed.
19. The semiconductor package of claim 17 wherein the underfill material is in areas between the semiconductor device and the substrate in addition to that in the groove.
The underfill material is not only located within the groove, but also fills other areas between the semiconductor device and the substrate. This provides comprehensive mechanical support and thermal dissipation. The package includes an underfill material placed between the semiconductor device and the substrate that fills at least a portion of the groove. The package has a substrate that includes a printed circuit board and a solder resist layer coated on its top surface. A groove, having two short sides and two long sides, is created in the solder resist layer to improve the flow of underfill material beneath the semiconductor device. The semiconductor device is then mounted on the substrate's top surface, but a portion of the groove remains exposed.
20. The semiconductor package of claim 17 , wherein the groove is narrower under the semiconductor device than outside a boundary of the semiconductor device.
The groove is narrower in the region underneath the semiconductor device compared to the region of the groove that extends beyond the device's boundary. This shape optimizes underfill flow and helps to avoid voids. The package includes an underfill material placed between the semiconductor device and the substrate that fills at least a portion of the groove. The package has a substrate that includes a printed circuit board and a solder resist layer coated on its top surface. A groove, having two short sides and two long sides, is created in the solder resist layer to improve the flow of underfill material beneath the semiconductor device. The semiconductor device is then mounted on the substrate's top surface, but a portion of the groove remains exposed.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
July 28, 2016
October 10, 2017
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