A semiconductor device includes a first transistor, a second transistor coupled in parallel with the first transistor, and a first parasitic inductance between an emitter of the first transistor and an emitter of the second transistor. The semiconductor device includes a first circuit configured to provide a first gate driver signal to the first transistor based on a common driver signal and a second circuit configured to provide a second gate driver signal to the second transistor based on the common driver signal. The first circuit and the second circuit are configured to compensate for a voltage drop across the first parasitic inductance such that the first gate driver signal and the second gate driver signal are in phase with and at the same magnitude as the common driver signal.
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1. A semiconductor device comprising: a first transistor; a second transistor coupled in parallel with the first transistor; a first parasitic inductance between an emitter of the first transistor and an emitter of the second transistor; a first circuit providing galvanic isolation and configured to provide a first gate driver signal to the first transistor based on a common driver signal; and a second circuit providing galvanic isolation and configured to provide a second gate driver signal to the second transistor based on the common driver signal, wherein the first circuit and the second circuit are configured to compensate for a voltage drop across the first parasitic inductance such that the first gate driver signal and the second gate driver signal are in phase with and at the same magnitude as the common driver signal.
A semiconductor device includes two transistors connected in parallel. A parasitic inductance exists between the emitters of these transistors. The device features two circuits that provide electrical isolation and drive the gates of each transistor based on a common input signal. These circuits compensate for voltage drops across the parasitic inductance, ensuring the gate drive signals for both transistors are in phase with and have the same magnitude as the original common driver signal.
2. The semiconductor device of claim 1 , further comprising: a first diode coupled between a collector and the emitter of the first transistor; and a second diode coupled between a collector and the emitter of the second transistor.
The semiconductor device described previously (two parallel transistors with parasitic inductance, isolated gate drivers compensating for voltage drop), also includes a diode connected between the collector and emitter of each transistor. These diodes provide a reverse current path.
3. The semiconductor device of claim 1 , wherein the first circuit comprises: a first isolated voltage supply; and a first isolated driver coupled to the first isolated voltage supply, the first isolated driver configured to receive the common driver signal and to provide the first gate driver signal based on the common driver signal; and wherein the second circuit comprises: a second isolated voltage supply; and a second isolated driver coupled to the second isolated voltage supply, the second isolated driver configured to receive the common driver signal and to provide the second gate driver signal based on the common driver signal.
In the semiconductor device (two parallel transistors, parasitic inductance, isolated gate drivers compensating for voltage drop), the gate driver circuit for each transistor consists of its own isolated voltage supply and an isolated driver. Each isolated driver is powered by its corresponding isolated voltage supply, receives the common driver signal, and generates the gate driver signal for its respective transistor.
4. The semiconductor device of claim 1 , further comprising: a third transistor coupled in series with the first transistor; a fourth transistor coupled in series with the second transistor and in parallel with the third transistor; a second parasitic inductance between an emitter of the third transistor and an emitter of the fourth transistor; a third circuit configured to provide a third gate driver signal to the third transistor based on a further common driver signal; and a fourth circuit configured to provide a fourth gate driver signal to the fourth transistor based on the further common driver signal, wherein the third circuit and the fourth circuit are configured to compensate for a voltage drop across the second parasitic inductance such that the third gate driver signal and the fourth gate driver signal are in phase with and at the same magnitude as the further common driver signal.
The semiconductor device previously described (two parallel transistors with parasitic inductance, isolated gate drivers compensating for voltage drop) is extended. It now includes a *second* pair of transistors, also in parallel, and connected in series with the first pair. A second parasitic inductance exists between the emitters of this second transistor pair. Similar to the first pair, this second pair also has two circuits to drive their gates based on a *second* common driver signal. These circuits compensate for voltage drops across *this second* parasitic inductance, ensuring the gate signals for the second transistor pair are in phase with and at the same magnitude as *their* common driver signal.
5. The semiconductor device of claim 1 , further comprising: an isolated voltage supply, wherein the first circuit comprises a first isolated driver coupled to the isolated voltage supply via first decoupling resistors, the first isolated driver configured to receive the common driver signal and to provide the first gate driver signal based on the common driver signal, and wherein the second circuit comprises a second isolated driver coupled to the isolated voltage supply via second decoupling resistors, the second isolated driver configured to receive the common driver signal and to provide the second gate driver signal based on the common driver signal.
The semiconductor device (two parallel transistors with parasitic inductance, isolated gate drivers compensating for voltage drop) uses a *single* isolated voltage supply for *both* gate driver circuits. Each gate driver circuit has an isolated driver connected to this shared voltage supply *through decoupling resistors*. Each isolated driver receives the common driver signal and generates the gate driver signal for its respective transistor.
6. The semiconductor device of claim 5 , wherein the isolated voltage supply provides a DC+ voltage, a DC− voltage, and a ground signal, wherein the first circuit comprises a first capacitor and a second capacitor, the first capacitor coupled between a first DC+ voltage signal path and a first ground signal path, and the second capacitor coupled between a first DC− voltage signal path and the first ground signal path, and wherein the second circuit comprises a third capacitor and a fourth capacitor, the third capacitor coupled between a second DC+ voltage signal path and a second ground signal path, and the fourth capacitor coupled between a second DC− voltage signal path and the second ground signal path.
The semiconductor device (two parallel transistors with parasitic inductance, isolated gate drivers compensating for voltage drop, single isolated voltage supply, decoupling resistors) uses an isolated voltage supply that provides positive DC voltage (DC+), negative DC voltage (DC-), and a ground signal. Each gate driver circuit includes two capacitors: one connected between the DC+ line and ground, and the other connected between the DC- line and ground. These capacitors filter noise on the power supply lines.
7. The semiconductor device of claim 1 , further comprising: an isolated voltage supply, wherein the first circuit comprises a first isolated driver coupled to the isolated voltage supply via a first coupled common mode choke, the first isolated driver configured to receive the common driver signal and to provide the first gate driver signal based on the common driver signal, and wherein the second circuit comprises a second isolated driver coupled to the isolated voltage supply via a second coupled common mode choke, the second isolated driver configured to receive the common driver signal and to provide the second gate driver signal based on the common driver signal.
The semiconductor device (two parallel transistors with parasitic inductance, isolated gate drivers compensating for voltage drop) uses a *single* isolated voltage supply for *both* gate driver circuits. Each gate driver circuit has an isolated driver connected to this shared voltage supply *through a coupled common mode choke*. Each isolated driver receives the common driver signal and generates the gate driver signal for its respective transistor.
8. The semiconductor device of claim 7 , wherein the isolated voltage supply provides a DC+ voltage, a DC− voltage, and a ground signal, wherein the first circuit comprises a first capacitor and a second capacitor, the first capacitor coupled between a first DC+ voltage signal path and a first ground signal path, and the second capacitor coupled between a first DC− voltage signal path and the first ground signal path, and wherein the second circuit comprises a third capacitor and a fourth capacitor, the third capacitor coupled between a second DC+ voltage signal path and a second ground signal path, and the fourth capacitor coupled between a second DC− voltage signal path and the second ground signal path.
The semiconductor device (two parallel transistors with parasitic inductance, isolated gate drivers compensating for voltage drop, single isolated voltage supply, coupled common mode choke) uses an isolated voltage supply that provides positive DC voltage (DC+), negative DC voltage (DC-), and a ground signal. Each gate driver circuit includes two capacitors: one connected between the DC+ line and ground, and the other connected between the DC- line and ground. These capacitors filter noise on the power supply lines.
9. The semiconductor device of claim 1 , wherein the first circuit comprises: a first isolated voltage supply; a first isolated driver coupled to the first isolated voltage supply, the first isolated driver configured to receive the common driver signal and to provide a first signal based on the common driver signal; and a first current amplifier coupled to the first isolated voltage supply, the first current amplifier configured to receive the first signal and to provide the first gate driver signal based on the first signal; and wherein the second circuit comprises: a second isolated voltage supply; a second isolated driver coupled to the second isolated voltage supply, the second isolated driver configured to receive the common driver signal and to provide a second signal based on the common driver signal; and a second current amplifier coupled to the second isolated voltage supply, the second current amplifier configured to receive the second signal and to provide the second gate driver signal based on the second signal.
In this semiconductor device (two parallel transistors, parasitic inductance, isolated gate drivers compensating for voltage drop), each gate driver circuit contains its own isolated voltage supply, an isolated driver, *and* a current amplifier. The isolated driver, powered by its own voltage supply, receives the common driver signal and outputs an intermediate signal. The current amplifier, also powered by that supply, amplifies the current of this intermediate signal to produce the final gate drive signal for its respective transistor.
10. The semiconductor device of claim 9 , wherein the first current amplifier comprises one of an emitter follower, a push-pull amplifier, and a voltage controlled current source, and wherein the second current amplifier comprises one of an emitter follower, a push-pull amplifier, and a voltage controlled current source.
In the semiconductor device (two parallel transistors, parasitic inductance, isolated gate drivers compensating for voltage drop, individual voltage supplies, isolated drivers, and current amplifiers), the current amplifier in each gate driver circuit can be implemented as either an emitter follower, a push-pull amplifier, or a voltage-controlled current source. These options provide different current amplification characteristics.
11. The semiconductor device of claim 1 , wherein the first circuit comprises: a first isolated voltage supply; a first coupled common mode choke configured to receive the common driver signal and to provide a first signal based on the common driver signal; a first driver coupled to the isolated voltage supply, the first driver configured to receive the first signal and to provide a second signal based on the first signal; and a first current amplifier coupled to the isolated voltage supply, the first current amplifier configured to receive the second signal and to provide the first gate driver signal based on the second signal; and wherein the second circuit comprises: a second isolated voltage supply; a second coupled common mode choke configured to receive the common driver signal and to provide a third signal based on the common driver signal; a second driver coupled to the isolated voltage supply, the second driver configured to receive the third signal and to provide a fourth signal based on the third signal; and a second current amplifier coupled to the isolated voltage supply, the second current amplifier configured to receive the fourth signal and to provide the second gate driver signal based on the fourth signal.
This semiconductor device (two parallel transistors, parasitic inductance, isolated gate drivers compensating for voltage drop) features gate driver circuits that include an isolated voltage supply, a coupled common mode choke, a driver, and a current amplifier. The common mode choke receives the common driver signal and creates an intermediate signal. The driver, powered by an isolated voltage supply, receives this intermediate signal and creates another signal. Finally, the current amplifier, also powered by the voltage supply, amplifies the current of this final signal to produce the gate driver signal for its respective transistor.
12. The semiconductor device of claim 11 , wherein the first current amplifier comprises one of an emitter follower, a push-pull amplifier, and a voltage controlled current source, and wherein the second current amplifier comprises one of an emitter follower, a push-pull amplifier, and a voltage controlled current source.
In the semiconductor device featuring gate driver circuits that each include an isolated voltage supply, a common mode choke, a driver, and a current amplifier (two parallel transistors, parasitic inductance, isolated gate drivers compensating for voltage drop), the current amplifier in each gate driver circuit can be implemented as either an emitter follower, a push-pull amplifier, or a voltage-controlled current source.
13. A power module comprising: a first switching device; a second switching device coupled in parallel with the first switching device; a first parasitic inductance between the first and second switching devices; a first circuit providing galvanic isolation and configured to receive a common driver signal and to provide a first signal to the first switching device for controlling the switching of the first switching device based on the common driver signal; and a second circuit providing galvanic isolation and configured to receive the common driver signal and to provide a second signal to the second switching device for controlling the switching of the second switching device based on the common driver signal, wherein the first circuit and the second circuit are each configured to compensate for a voltage drop across the first parasitic inductance such that the first signal and the second signal are in phase with and at the same magnitude as the driver signal.
A power module consists of two switching devices in parallel, with a parasitic inductance between them. The module contains two electrically isolated circuits that receive a common driver signal. Each circuit generates a signal to control the switching of its respective device. These circuits compensate for voltage drops across the parasitic inductance, ensuring the signals controlling the switching devices are in phase with and at the same magnitude as the original common driver signal.
14. The power module of claim 13 , wherein the first circuit comprises a first isolated DC to DC converter powering a first isolated driver, the first isolated driver configured to receive the common driver signal and to provide the first signal based on the common driver signal; and wherein the second circuit comprises a second isolated DC to DC converter powering a second isolated driver, the second isolated driver configured to receive the common driver signal and to provide the second signal based on the common driver signal.
The power module previously described (two parallel switching devices, parasitic inductance, isolated gate drivers compensating for voltage drop) implements each isolation circuit with a separate, isolated DC-to-DC converter powering an isolated driver. The isolated driver receives the common drive signal and generates a control signal for its switching device.
15. The power module of claim 13 , further comprising: an isolated DC to DC converter providing a DC+ voltage, a DC− voltage, and a ground signal; wherein the first circuit comprises first decoupling resistors coupled between the isolated DC to DC converter and a first isolated driver, a first capacitor coupled between a first DC+ voltage signal path and a first ground signal path, and a second capacitor coupled between a first DC− voltage signal path and the first ground signal path, the first isolated driver configured to receive the common driver signal and to provide the first signal based on the common driver signal; and wherein the second circuit comprises second decoupling resistors coupled between the isolated DC to DC converter and a second isolated driver, a third capacitor coupled between a second DC+ voltage signal path and a second ground signal path, and a fourth capacitor coupled between a second DC− voltage signal path and the second ground signal path, the second isolated driver configured to receive the common driver signal and to provide the second signal based on the common driver signal.
The power module (two parallel switching devices, parasitic inductance, isolated gate drivers compensating for voltage drop) includes an *isolated* DC-to-DC converter that provides positive DC voltage, negative DC voltage, and a ground signal. The first circuit contains decoupling resistors, capacitors between DC+ and ground, and capacitors between DC- and ground, to power an isolated driver. The second circuit contains similar decoupling resistors and capacitors, all powering its own isolated driver. Each isolated driver generates a control signal for its respective switching device based on the common drive signal.
16. The power module of claim 13 , further comprising: an isolated DC to DC converter providing a DC+ voltage, a DC− voltage, and a ground signal; wherein the first circuit comprises a first coupled common mode choke coupled between the isolated DC to DC converter and a first isolated driver, a first capacitor coupled between a first DC+ voltage signal path and a first ground signal path, and a second capacitor coupled between a first DC− voltage signal path and the first ground signal path, the first isolated driver configured to receive the common driver signal and to provide the first signal based on the common driver signal; and wherein the second circuit comprises a second coupled common mode choke coupled between the isolated DC to DC converter and a second isolated driver, a third capacitor coupled between a second DC+ voltage signal path and a second ground signal path, and a fourth capacitor coupled between a second DC− voltage signal path and the second ground signal path, the second isolated driver configured to receive the common driver signal and to provide the second signal based on the common driver signal.
The power module (two parallel switching devices, parasitic inductance, isolated gate drivers compensating for voltage drop) includes an isolated DC-to-DC converter that provides positive DC voltage, negative DC voltage, and a ground signal. The first circuit contains a coupled common mode choke, a capacitor between DC+ and ground, and another between DC- and ground, to power an isolated driver. The second circuit contains a similar common mode choke and capacitors. Each isolated driver generates a control signal for its respective switching device based on the common drive signal.
17. The power module of claim 13 , wherein the first circuit comprises a first isolated DC to DC converter powering a first isolated driver and a first current amplifier, the first isolated driver configured to receive the common driver signal and to provide a third signal based on the common driver signal, and the first current amplifier configured to receive the third signal and to provide the first signal based on the third signal; and wherein the second circuit comprises a second isolated DC to DC converter powering a second isolated driver and a second current amplifier, the second isolated driver configured to receive the common driver signal and to provide a fourth signal based on the common driver signal, and the second current amplifier configured to receive the fourth signal and to provide the second signal based on the fourth signal.
In the power module previously described (two parallel switching devices, parasitic inductance, isolated gate drivers compensating for voltage drop), the first isolation circuit contains an isolated DC-to-DC converter that powers *both* an isolated driver *and* a current amplifier. The isolated driver receives the common driver signal and produces an intermediate signal. The current amplifier then amplifies this signal to generate the control signal for the first switching device. The second isolation circuit mirrors this setup.
18. The power module of claim 13 , wherein the first circuit comprises a first coupled common mode choke and a first isolated DC to DC converter powering a first driver and a first current amplifier, the first coupled common mode choke configured to receive the common driver signal to provide a third signal based on the common driver signal, the first driver configured to receive the third signal and to provide a fourth signal based on the third signal, and the first current amplifier configured to receive the fourth signal and to provide the first signal based on the fourth signal; and wherein the second circuit comprises a second coupled common mode choke and a second isolated DC to DC converter powering a second driver and a second current amplifier, the second coupled common mode choke configured to receive the common driver signal and to provide a fifth signal based on the common driver signal, the second driver configured to receive the fifth signal and to provide a sixth signal based on the fifth signal, and the second current amplifier configured to receive the sixth signal and to provide the second signal based on the sixth signal.
In the power module (two parallel switching devices, parasitic inductance, isolated gate drivers compensating for voltage drop), the first isolation circuit includes a coupled common mode choke, an isolated DC-to-DC converter, a driver, and a current amplifier. The choke receives the common driver signal and creates an intermediate signal. The driver then processes this signal. Finally, the current amplifier amplifies the driver's output to create the control signal for the first switching device. The second isolation circuit mirrors this architecture.
19. A method for switching devices in a power circuit with paralleled devices, the method comprising: receiving a common driver signal configured for switching each of the devices; and galvanic isolating and shifting the common driver signal to provide an individual device driver signal at each device to compensate for an inductive voltage drop between each device such that each individual device driver signal at each device is in phase with and at the same magnitude as the common driver signal.
A method for switching parallel devices in a power circuit involves receiving a common driver signal. The method then electrically isolates and modifies the common driver signal for each device individually. This modification compensates for inductive voltage drops between devices, such that each individual driver signal at each device remains in phase with and at the same magnitude as the original common driver signal.
20. The method of claim 19 , wherein shifting the common driver signal comprises: individually isolating a voltage supply for each device; and individually isolating the common driver signal via an isolated driver powered by the respective isolated voltage supply for each device to provide the individual device driver signal at each device.
The method of compensating for inductive voltage drop by isolating and modifying a common driver signal to drive parallel devices involves individually isolating a voltage supply for each device and individually isolating the common driver signal using an isolated driver (powered by the corresponding isolated voltage supply). This provides a dedicated driver signal at each device.
21. The method of claim 19 , wherein shifting the common driver signal comprises: isolating a voltage supply; individually decoupling the voltage supply from an isolated driver for each device; and individually isolating the common driver signal via the isolated driver for each device to provide the individual device driver signal at each device.
The method of compensating for inductive voltage drop by isolating and modifying a common driver signal to drive parallel devices comprises isolating a voltage supply, individually decoupling the voltage supply from an isolated driver for each device using resistors or chokes, and individually isolating the common driver signal through each isolated driver, providing a unique device driver signal.
22. The method of claim 19 , wherein shifting the common driver signal comprises: individually isolating a voltage supply for each device; and individually isolating the common driver signal via an isolated driver and a current amplifier powered by the respective isolated voltage supply for each device to provide the individual device driver signal at each device.
The method of compensating for inductive voltage drop by isolating and modifying a common driver signal to drive parallel devices involves individually isolating a voltage supply for each device and individually isolating the common driver signal via an isolated driver *and* a current amplifier, both powered by their respective isolated voltage supply. This combined driver/amplifier approach provides a distinct signal for each device.
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March 15, 2011
October 17, 2017
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