Patentable/Patents/US-9798475
US-9798475

Memory system and method of controlling nonvolatile memory

PublishedOctober 24, 2017
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

According to one embodiment, a controller writes data stored in a first data group of a plurality of data groups into a first block group of the plurality of block groups and writes data stored in a second data group of the plurality of data groups into a second block group of the plurality of block groups in a case where a first condition is satisfied.

Patent Claims
16 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A memory system comprising: a nonvolatile memory that includes a plurality of blocks; a backup area, and a controller configured to group data stored in the nonvolatile memory into a plurality of data groups based on a first value, the first value corresponding to an access frequency or a number of access times for the data from a host; and group the plurality of blocks into a plurality of block groups based on a second value, the second value corresponding to a degree of wear of each of the blocks; and write data stored in a first data group of the plurality of data groups into a first block group of the plurality of block groups and write data stored in a second data group of the plurality of data groups into a second block group of the plurality of block groups in a case where a second condition is satisfied, and in a case where a first condition is satisfied, notify information to the host, the information including a vacant capacity of the nonvolatile memory, priority levels of the plurality of data groups, and a user capacity of the nonvolatile memory, the user capacity decreasing according to data multiplexing, the data multiplexing including copying multiplexing target data from a first area of the nonvolatile memory to a second area of the nonvolatile memory, wherein the controller, in a case where the data multiplexing is determined to be executed, writes data included in the first data group among the plurality of data groups into the backup area and, in a case where an error of data grouped into the first data group cannot be corrected, writes the data stored in the backup area into the blocks.

2

2. The memory system according to claim 1 , wherein the controller determines whether or not the first condition is satisfied based on at least one of a bit error rate, a number of bad blocks, and an erasing time.

3

3. The memory system according to claim 2 , wherein the controller determines whether data multiplexing is to be executed based on a response from the host that corresponds to the notification to the host and, in a case where the data multiplexing is determined to be executed, changes the user capacity of the nonvolatile memory and writes data included in a first data group among the plurality of data groups into the blocks.

4

4. The memory system according to claim 3 , wherein the controller notifies a valid capacity of the nonvolatile memory to the host after completion of the data multiplexing.

5

5. The memory system according to claim 1 , wherein the controller determines whether or not the second condition is satisfied based on at least one of a bit error rate, a number of bad blocks, and an erasing time.

6

6. The memory system according to claim 1 , wherein the first value of the first data group is larger than the first value of the second data group, and the second value of the first block group is smaller than the second value of the second block group.

7

7. The memory system according to claim 6 , wherein the first value of the first data group is the largest among the first values of the plurality of data groups, the second value of the first block group is the smallest among the second values of the plurality of block groups, the first value of the second data group is the smallest among the first values of the plurality of data groups, and the second value of the second block group is the largest among the second values of the plurality of block groups.

8

8. The memory system according to claim 1 , wherein the second value is the maximum number of error bits among a plurality of the number of error bits corresponding to a plurality of pages included in the block.

9

9. The memory system according to claim 1 , wherein the second value is an accumulated value of the number of error correction times of the block.

10

10. The memory system according to claim 1 , wherein the first value is a number of times of reading based on a request from the host.

11

11. The memory system according to claim 6 , wherein, in a case where the second condition is satisfied when a certain period elapses since writing to the first block group and writing to the second block group, the controller is configured to write data stored in a third data group of the plurality of data groups into a third block group of the plurality of block groups and write data stored in a fourth data group of the plurality of data groups into a fourth block group of the plurality of block groups, the first value of the third data group being larger than the first value of the fourth data group, the second value of the third block group being smaller than the second value of the fourth block group.

12

12. A method for controlling a nonvolatile memory including a plurality of blocks, the method comprising: grouping data stored in the nonvolatile memory into a plurality of data groups based on a first value, the first value corresponding to an access frequency or a number of access times for the data from a host; and grouping the plurality of blocks into a plurality of block groups based on a second value, the second value corresponding to a degree of wear of each of the blocks; and writing data stored in a first data group of the plurality of data groups into a first block group of the plurality of block groups and writing data stored in a second data group of the plurality of data groups into a second block group of the plurality of block groups in a case where a second condition is satisfied, and in a case where a first condition is satisfied, notifying information to the host, the information including a vacant capacity of the nonvolatile memory, priority levels of the plurality of data groups, and a user capacity of the nonvolatile memory, the user capacity decreasing according to data multiplexing, the data multiplexing including copying multiplexing target data from a first area of the nonvolatile memory to a second area of the nonvolatile memory, further comprising, in a case where the data multiplexing is determined to be executed, writing data included in the first data group among the plurality of data groups into the backup area and, in a case where an error of data grouped into the first data group cannot be corrected, writing the data stored in the backup area into the blocks.

13

13. The method according to claim 12 , further comprising determining whether or not the first condition is satisfied based on at least one of a bit error rate, a number of bad blocks, and an erasing time.

14

14. The method according to claim 13 , further comprising determining whether data multiplexing is to be executed based on a response from the host that corresponds to the notification to the host and, in a case where the data multiplexing is determined to be executed, changing the user capacity of the nonvolatile memory and writing data included in a first data group among the plurality of data groups into the blocks.

15

15. The method according to claim 14 , further comprising notifying a valid capacity of the nonvolatile memory to the host after completion of the data multiplexing.

16

16. The method according to claim 12 , further comprising determining whether or not the second condition is satisfied based on at least one of a bit error rate, a number of bad blocks, and an erasing time.

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Patent Metadata

Filing Date

August 31, 2015

Publication Date

October 24, 2017

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Cite as: Patentable. “Memory system and method of controlling nonvolatile memory” (US-9798475). https://patentable.app/patents/US-9798475

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