A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and a method of manufacturing thereof, that comprises a first semiconductor die, a plurality of adhesive regions spaced apart from each other on the first semiconductor die, and a second semiconductor die adhered to the plurality of adhesive regions.
Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A semiconductor device comprising: a substrate; a first semiconductor die having a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate; a plurality of adhesive regions spaced apart from each other on the top first die surface; and a second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
A semiconductor device includes a substrate, a first semiconductor die attached to the substrate, and a second semiconductor die stacked on top of the first die. The first die is electrically connected to the substrate. A set of separate adhesive regions bonds the bottom of the second die to the top of the first die. These adhesive regions are spaced apart, consist only of adhesive material, and fully fill the gap between the two dies, providing structural support and mechanical connection. The second die is also electrically connected to the substrate.
2. The semiconductor device of claim 1 , wherein the substrate is a circuit board.
The semiconductor device described previously uses a circuit board as the substrate on which the first semiconductor die is mounted. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the circuit board, and the first semiconductor die is electrically connected to the circuit board. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the circuit board, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
3. The semiconductor device of claim 1 , wherein the volume directly between the first semiconductor die and the second semiconductor die comprises only the plurality of adhesive regions and air.
In the semiconductor device, the space between the first and second semiconductor dies contains only the separate adhesive regions and air. There is no other filler material present. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
4. The semiconductor device of claim 1 , wherein at least a portion of the plurality of adhesive regions are positioned at corners of the first semiconductor die and/or the second semiconductor die.
In the semiconductor device, at least some of the separate adhesive regions are positioned at the corners of either the first semiconductor die or the second semiconductor die, or both. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
5. The semiconductor device of claim 1 , wherein at least a portion of the plurality of adhesive regions are positioned along sides of the first semiconductor die and/or the second semiconductor die, at midpoints of the sides.
In the semiconductor device, at least some of the separate adhesive regions are positioned along the sides of either the first semiconductor die or the second semiconductor die, or both, specifically at the midpoints of those sides. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
6. The semiconductor device of claim 1 , wherein at least one of the plurality of adhesive regions is formed at the center of the first semiconductor die and/or the second semiconductor die.
In the semiconductor device, at least one of the separate adhesive regions is located at the center of the first semiconductor die or the second semiconductor die, or both. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
7. The semiconductor device of claim 1 , wherein each of the plurality of adhesive regions has a vertical thickness in a range of 10 μm to 50 μm.
In the semiconductor device, each of the separate adhesive regions has a vertical thickness (height) between 10 μm and 50 μm. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
8. The semiconductor device of claim 1 , wherein the adhesive regions are made of at least one of: a plastomer, an elastomer, a thermoplastic elastomer, a thermosetting resin, and a photo-curable resin.
The adhesive regions in the semiconductor device are made of a plastomer, an elastomer, a thermoplastic elastomer, a thermosetting resin, or a photo-curable resin, or some combination thereof. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
9. The semiconductor device of claim 1 , wherein each of the plurality of adhesive regions comprises: a first adhesive region on and adhered directly to the top first die surface; and a second adhesive region on and adhered directly to the top first die surface and the first adhesive region, and adhered directly to the bottom second die surface.
Each separate adhesive region in the semiconductor device is composed of two layers: a first adhesive region directly on the top of the first semiconductor die, and a second adhesive region on top of the first adhesive region and adhering to the bottom of the second semiconductor die. Both adhesive regions are in direct contact with the first die. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
10. The semiconductor device of claim 9 , wherein the first adhesive region comprises a first adhesive, and the second adhesive region comprises a second adhesive different from the first adhesive.
In the semiconductor device where each adhesive region has two layers, the first adhesive region uses a different adhesive material than the second adhesive region. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface. Each of the plurality of adhesive regions comprises: a first adhesive region on and adhered directly to the top first die surface; and a second adhesive region on and adhered directly to the top first die surface and the first adhesive region, and adhered directly to the bottom second die surface.
11. The semiconductor device of claim 10 , wherein the first adhesive has a higher modulus than the second adhesive.
In the semiconductor device where each adhesive region has two layers made of different materials, the first adhesive (closest to the first die) has a higher modulus (stiffness) than the second adhesive (closest to the second die). The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface. Each of the plurality of adhesive regions comprises: a first adhesive region on and adhered directly to the top first die surface; and a second adhesive region on and adhered directly to the top first die surface and the first adhesive region, and adhered directly to the bottom second die surface. The first adhesive region comprises a first adhesive, and the second adhesive region comprises a second adhesive different from the first adhesive.
12. The semiconductor device of claim 1 , wherein the second semiconductor die comprises a micro electro-mechanical systems (MEMS) device and the MEMS device comprises a through-hole.
In the semiconductor device, the second semiconductor die is a micro electro-mechanical systems (MEMS) device. Furthermore, this MEMS device includes a through-hole that passes entirely through the die. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
13. The semiconductor device of claim 12 , comprising a cover adhered to the substrate and covering the first semiconductor die, the adhesive regions and the second semiconductor die, wherein the cover comprises a through-hole.
The semiconductor device, where the second die is a MEMS device with a through-hole, also includes a cover adhered to the substrate that encloses the first semiconductor die, the separate adhesive regions, and the second semiconductor die (MEMS device). The cover itself has a through-hole. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface. The second semiconductor die comprises a micro electro-mechanical systems (MEMS) device and the MEMS device comprises a through-hole.
14. The semiconductor device of claim 1 , wherein the first semiconductor die is electrically connected to the substrate by conductive bumps positioned directly between the first semiconductor die and the substrate, and the second semiconductor die is electrically connected to the substrate by conductive wires.
In this semiconductor device, the first semiconductor die is electrically connected to the substrate using conductive bumps positioned directly between the first die and the substrate. The second semiconductor die is electrically connected to the substrate using conductive wires. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the adhesive regions comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
15. A semiconductor device comprising: a substrate; a first semiconductor die having a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate; a plurality of adhesive regions spaced apart from each other on the top first die surface; and a second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the plurality of adhesive regions comprises: a first adhesive layer on and adhered to the top first die surface; a central layer comprising a central film on top of and adhered to the first adhesive layer; and a second adhesive layer on top of and adhered to the central layer, and adhered to the bottom second die surface.
A semiconductor device includes a substrate, a first semiconductor die attached to the substrate, and a second semiconductor die stacked on top of the first die. The first die is electrically connected to the substrate. Separate adhesive regions bond the bottom of the second die to the top of the first die. Each adhesive region consists of three layers: a first adhesive layer directly on the first die, a central film layer on top of the first adhesive, and a second adhesive layer on top of the central film bonded to the second die. The second die is electrically connected to the substrate.
16. The semiconductor device of claim 15 , wherein the central layer comprises an elastomer.
In the semiconductor device using a three-layer adhesive region (adhesive/film/adhesive), the central film layer is made of an elastomer material. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the plurality of adhesive regions comprises: a first adhesive layer on and adhered to the top first die surface; a central layer comprising a central film on top of and adhered to the first adhesive layer; and a second adhesive layer on top of and adhered to the central layer, and adhered to the bottom second die surface.
17. The semiconductor device of claim 15 , wherein the central layer has a lower modulus than the first and second adhesive layers.
In the semiconductor device using a three-layer adhesive region (adhesive/film/adhesive), the central film layer has a lower modulus (stiffness) than both the first and second adhesive layers. The first semiconductor die has a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate. A plurality of adhesive regions spaced apart from each other on the top first die surface are used. A second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate, wherein each of the plurality of adhesive regions comprises: a first adhesive layer on and adhered to the top first die surface; a central layer comprising a central film on top of and adhered to the first adhesive layer; and a second adhesive layer on top of and adhered to the central layer, and adhered to the bottom second die surface. The central layer comprises an elastomer.
18. A semiconductor device comprising: a first semiconductor die having a top first die surface; adhesive material on the top first die surface and comprising a plurality of volumes of the adhesive material separated from each other by a space; and a second semiconductor die having a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of volumes of the adhesive material, wherein the adhesive material comprises the only material that is directly between the first and second semiconductor dies.
A semiconductor device includes a first semiconductor die, and a second semiconductor die stacked on top of the first die. Adhesive material bonds the second die to the first die, but the adhesive is applied in separate volumes or regions, separated by empty space. The adhesive is the only material directly between the first and second dies.
19. The semiconductor device of claim 18 , wherein: each of the volumes of the adhesive material comprises a first adhesive volume and a second adhesive volume, both of which are between the first and second semiconductor dies; and each of the volumes of the adhesive material comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
In the semiconductor device, the separated volumes of adhesive material are each composed of a first and a second adhesive volume, both located between the first and second semiconductor dies. Each adhesive volume is made of only adhesive and fully fills the vertical gap between the two dies. The adhesive material comprises the only material that is directly between the first and second semiconductor dies.
20. The semiconductor device of claim 18 , wherein there is no adhesive material connecting a first volume of the plurality of volumes of the adhesive material to a second volume of the plurality of volumes of the adhesive material.
In the semiconductor device, the separate adhesive volumes are not connected to each other by any adhesive material. There is a distinct separation between each volume. The adhesive material comprises the only material that is directly between the first and second semiconductor dies; each of the volumes of the adhesive material comprises a first adhesive volume and a second adhesive volume, both of which are between the first and second semiconductor dies; and each of the volumes of the adhesive material comprises only adhesive material and bridges an entire vertical gap between the top first die surface and the bottom second die surface.
21. A semiconductor device comprising: a substrate; a first semiconductor die having a top first die surface and a bottom first die surface, wherein the bottom first die surface is coupled to the substrate, and the first semiconductor die is electrically connected to the substrate; a plurality of adhesive regions spaced apart from each other on the top first die surface; and a second semiconductor die having a top second die surface and a bottom second die surface, wherein the bottom second die surface is adhered to the plurality of adhesive regions, and the second semiconductor die is electrically connected to the substrate wherein each of the plurality of adhesive regions comprises: a first adhesive region on and adhered to the top first die surface, the first adhesive region comprising a first adhesive; and a second adhesive region on and adhered to the top first die surface and the first adhesive region, and adhered to the bottom second die surface, the second adhesive region comprising a second adhesive different from the first adhesive.
A semiconductor device includes a substrate, a first semiconductor die attached to the substrate, and a second semiconductor die stacked on top of the first die. The first die is electrically connected to the substrate. Separate adhesive regions bond the bottom of the second die to the top of the first die. Each adhesive region is composed of two layers: a first adhesive region directly on the first die (using a first adhesive) and a second adhesive region on top of the first adhesive region (using a second, different adhesive), also bonded to the second die. The second die is electrically connected to the substrate.
22. The semiconductor device of claim 21 , wherein the first adhesive has a higher modulus than the second adhesive.
In the semiconductor device where each adhesive region has two layers of different adhesives, the first adhesive (closest to the first die) has a higher modulus (stiffness) than the second adhesive (closest to the second die). The substrate is connected to the first semiconductor die and the second semiconductor die using a two-layered adhesive region system where a first adhesive region on and adhered to the top first die surface, the first adhesive region comprises a first adhesive; and a second adhesive region is on and adhered to the top first die surface and the first adhesive region, and adhered to the bottom second die surface, the second adhesive region comprising a second adhesive different from the first adhesive.
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May 9, 2016
November 7, 2017
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