Buffered equidistant data acquisition for control applications

1. A method for configuring a transfer of signals associated with an iterative and synchronized, time-based data acquisition (DAQ) operation between at least one input device and at least one output device, the method comprising: requesting and receiving, at a controller having one or more processors, in real time, signal data samples from the at least one input device; preliminarily mapping, with the controller, a series of the received signal data samples to a buffer as said requesting and receiving is repeated after predetermined and equidistant time intervals; comparing with the controller a time indicator of each of the series of received signal data samples against a time indicator of a previously-received signal data sample to confirm that no signal data sample is lost; requesting from the at least one input device with the controller a missing signal data sample in response to said comparing if one of the signal data samples is lost; transmitting the missing signal data sample to the controller from the at least one input device in response to said requesting the missing signal data sample; receiving at the controller, from the at least one input device, the missing signal data sample in response to said transmitting; rearranging the series of signal data samples for final mapping in the buffer with the controller to arrange the series in time sequence; and transmitting in real time, with the controller, to the at least one output device, at least a portion of a present signal data sample prior to said receiving the missing signal data sample by the controller.

2. The method of claim 1 further comprising: displaying, on a display in communication with the controller, the series of received signal data samples after said rearranging.

3. The method of claim 1 wherein the time indicator is further defined as a timestamp or an incremental sample identification.

4. The method of claim 1 further comprising: requesting and receiving, at the controller, asynchronous signal data samples from the at least one input device.

5. The method of claim 4 further comprising: correlating, with the controller, a timestamp of each asynchronous signal data samples received from the at least one input device with the time indicator of one or more of the signal data samples.

6. The method of claim 5 further comprising: requesting from the at least one input device with the controller a missing asynchronous signal data sample; transmitting the missing signal data sample to the controller from a sample index of the at least one input device in response to said requesting the missing signal data sample; and receiving at the controller, from the at least one input device, the missing asynchronous signal data sample.

7. The method of claim 1 further comprising: executing, with the controller, operations on an equidistant or non-equidistant time history of the signal data samples.

8. The method of claim 7 wherein said executing is further defined as: executing, with the controller, operations including at least one of: (i) an operation that does not introduce latency consisting of at least one of algebraic operations, trigonometric operations, alarm threshold comparison, triggering on a single received signal data sample, or (ii) an operation that does introduce latency consisting of at least one of filtering, derivation, integration, statistics, FFT analysis, octave analysis, correlation, PID control on a plurality of received signal data samples.

9. The method of claim 7 wherein said executing is performed in real time.

10. The method of claim 7 wherein an output result of said executing includes latency information associated with both of a delay in retrieving missing signal data samples and also a delay arising due to said executing.

11. The method of claim 10 wherein the output result of said executing includes a first output delayed by said rearranging of the final remapping and a second output emitted prior to said rearranging and therefore not delayed.

12. The method of claim 7 further comprising: controlling, with the controller, the at least one output device in response to said executing.

13. The method of claim 1 wherein each signal data sample further comprises latency information due to said rearranging for final mapping of the series of signal data samples.

14. The method of claim 1 further comprising: transmitting, with the controller, contents of the buffer after said remapping to remote view clients.

15. The method of claim 1 further comprising: transmitting, with the controller, contents of the buffer to storage that is physically remote from or local to the controller.

16. The method of claim 1 further comprising: controlling, with the controller, the at least one output device in real time regardless of an outcome of said comparing.

17. The method of claim 16 wherein said controlling the at least one output device and said requesting the missing signal data sample are performed substantially concurrently.

18. The method of claim 16 wherein said controlling the at least one output device and said remapping are performed substantially concurrently.

19. The method of claim 1 wherein said transmitting the at least one output device is further defined as: transmitting in real time, with the controller, to the at least one output device being an actuator applying a physical load on a test subject, the at least a portion of the present signal data sample prior to said receiving the missing signal data sample by the controller.

20. A system for configuring a transfer of signals associated with an iterative and synchronized, time-based data acquisition (DAQ) operation between at least one input device and at least one output device, the system comprising: an input device configured to transmit signal data samples associated with a test subject; a computing device in communication with said input device, said computing device having a controller with one or more processors and a non-transitory, computer readable medium storing instructions that, when executed by said one or more processors, cause said computing device to perform operations comprising: requesting and receiving, in real time, said signal data samples from said at least one input device; preliminarily mapping a series of said received signal data samples to a buffer as the requesting and receiving is repeated after a predetermined and equidistant time interval; comparing with said controller a time indicator of each of said series of received signal data samples against a time indicator of a previously-received signal data sample to confirm that no signal data sample is lost; requesting from said at least one input device with said controller a missing signal data sample in response to said comparing if one of said signal data samples is lost; transmitting said missing signal data sample to said controller from said at least one input device in response to the requesting of said missing signal data sample; receiving at said controller, from said at least one input device, said missing signal data sample in response to the transmitting; rearranging said series of signal data samples for final mapping in said buffer with said controller to arrange said series in time sequence; and transmitting in real time, with said controller, to said at least one output device, at least a portion of a present signal data sample prior to the receiving of said missing signal data sample by said controller.