Imaging apparatus with phase contrast detection type of focal point detection

This application is a Continuation of U.S. application Ser. No. 14/956,241, filed Dec. 1, 2015 which is a Continuation of U.S. application Ser. No. 13/764,657, filed Feb. 11, 2013, which now becomes U.S. Pat. No. 9,224,771, issued on Dec. 29, 2015 which claims the benefit of Japanese Patent Application No. 2012-033367 filed Feb. 17, 2012, which are hereby incorporated by reference herein in their entireties.

The present invention relates to an imaging apparatus, and particularly relates to an imaging apparatus that performs a phase contrast detection type of focal point detection at the imaging face.

With the related art, configurations performing a phase contrast detection type of focal point detection at an imaging face of an imaging apparatus are known. Japanese Patent Laid-Open No. 2010-288083, for example, discloses a CMOS imaging device that includes imaging pixels to generate image generation signals, and focal point detection pixels to generate phase contrast detection signals. Also, for frames in which focal point detection is performed, all imaging pixels of the imaging devices are exposed simultaneously, and the imaging signal generated as a result of this exposure is read out. For frames in which focal point detection is not performed, the imaging signals from the imaging devices are read out by a slit rolling read out. Further, FIG. 4 and paragraph 0018 of Japanese Patent Laid-Open No. 2010-288083 describe a collective electron shutter being performed to align accumulated point-in-time of all pixels.

However, despite that the configuration in Japanese Patent Laid-Open No. 2010-288083 does not perform the phase contrast detection type of focal point detection at the imaging face, but does perform the collective electronic shutter, enough consideration has not been given to the configuration of pixels to actually achieve these results. Referencing FIGS. 2 and 4 of Japanese Patent Laid-Open No. 2010-288083 illustrates that a charge generated at a photoelectric conversion unit is transferred together for all pixels to a floating diffusion (hereafter, FD). Also, this charge is accumulated in the FD until a timing for the read out of each row of pixels. The configuration of the FD is basically not suitable for long-term holding of charges. Specifically, it is difficult to create a configuration in which little dark current is generated during the signal holding period. Further, it is also difficult to remove noise signals related to the pixel signals. It is theoretically possible to remove noise by including several rows worth of circuits to hold noise signals in a column circuit, but the space taken by the column circuits may become large. Further, the length of the holding period for the noise signal column circuit differs for each row, which may decrease the precision of noise removal.

It has been found desirable to provide an imaging apparatus that is capable of a phase contrast detection type of focal point detection at the imaging face, with a configuration that is capable of performing a global electronic shutter with low noise.

According to one aspect, an imaging apparatus includes: a plurality of pixels each including a photoelectric conversion unit, and an amplification element to amplify signals based on signal charges generated by the photoelectric conversion unit, in which the plurality of pixels output signals for performing a phase contrast detection type of focal point detection; and a signal holding unit in an electrical pathway between an output node of the photoelectric conversion unit and an input node of the amplification element, in which signals for performing the phase contrast detection type of focal point detection are held.

Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings.

The present technology is divided into two embodiments. Each embodiment includes multiple examples. The first Embodiment is a configuration with distinctly different pixels for focal point detection and pixels for imaging, in which to perform a phase contrast detection type of focal point detection on an imaging face. For example, the aperture of the focal point detection pixels is narrower than the aperture of the imaging pixels. The focal point detection pixels include a light-shielding member, and are configured such that an orthogonally projected image of the light-shielding member as to a photoelectric conversion unit partially overlaps the photoelectric conversion unit.

The second Embodiment is a configuration for performing the phase contrast detection type of focal point detection on the imaging face, in which the configuration includes multiple photoelectric conversion units that correspond to one microlens in one pixel, and so focal point detection is performed by using each of the signals from multiple photoelectric conversion units.

While the present technology will be described here by way of the first Embodiment and the second Embodiment, the present technology may be applicable to portions of other embodiments without departing from the scope of the present technology. For example, the first Embodiment has different pixel configurations for imaging pixels and for focal point detection pixels. The configuration of pixels in the second Embodiment may be used in an imaging apparatus that includes the focal point detection mechanism of the first Embodiment, and so details for these kinds of configurations will be described for each embodiment.

1 FIG. is a top view of a portion of an imaging region of an imaging apparatus in the first Example of the first Embodiment. The imaging region of the imaging apparatus in the present embodiment has both imaging pixels and focal point detection pixels, which output signals for performing focal point detection, and these pixels are disposed in an array.

101 101 101 101 101 100 1 FIG. Multiples pixels,a,b,c, andd are disposed in an array on an imaging region. Circles inrepresent microlenses. Squares within the circles represent the aperture of each pixel.

101 101 101 101 101 101 101 101 101 1 FIG. 1 FIG. The first pixelis an imaging pixel. Its aperture is wider as compared to other pixels. The aperture of a second pixela is narrower than that of the first pixel, and the region of the aperture of the first pixelon the right side ofis shielded from light. The aperture of a third pixelb is narrower than that of the first pixel, and the region of the aperture of the first pixelon the left side ofis shielded from light. The second pixela and the third pixelb enable the phase contrast detection type of focal point detection to be performed by pupil slicing.

101 101 101 101 101 101 101 101 1 FIG. 1 FIG. The aperture of a fourth pixelc is narrower than that of the first pixel, and the region of the aperture of the first pixelon the bottom side ofis shielded from light. The aperture of a fifth pixeld is narrower than that of the first pixel, and the region of the aperture of the first pixelon the top side ofis shielded from light. The fourth pixelc and the fifth pixeld enable the phase contrast detection type of focal point detection to be performed by pupil slicing.

2 FIG. 3 FIG. 2 3 FIGS.and 2 FIG. 101 101 illustrates an expanded top view of the imaging region of the imaging apparatus in the present embodiment. The first pixeland the second pixela are adjacent with each other in the region illustrated here.illustrates an example equivalent circuit diagram of pixels in the present embodiment. The members denoted with the same reference numerals inhave the same functions. Members denoted with the same numerals inhave the same functions in both the first pixel and the second pixel. Configuration elements of the second pixel are denoted with a reference code A to distinguish between the first pixel and the second pixel. Only those portions of the second pixel that differ from the first pixel will be described.

1 1 1 An electron hole is generated when light illuminates on the photoelectric conversion unit PD. A first signal holding unit MEMis configured to hold a charge to be used as a signal charge from the electron hole. The following describes cases where electrons are used as the signal charge. A first charge transfer unit TXis disposed in the electrical pathway between the photoelectric conversion unit PD and the first signal holding unit MEM.

1 2 4 210 The electrons held at the first signal holding unit MEMare transferred to a floating diffusion FD via a second charge transfer unit TX. FD is electrically connected to an input node of an amplification transistor SF in the pixel. The floating diffusion FD may also be configured with the input node of the amplification transistor SF. A selection transistor SEL is disposed in the electrical pathway between the amplification transistor SF and a vertical signal line VOUT. Pixels read out from each vertical signal line VOUT are selected by the selection transistor SEL. A reset transistor RES performs resets by supplying a reference voltage to a gate of the amplification transistor SF. An overflow drain control unit (hereafter OFD control unit) TXdrains electrons generated at the photoelectric conversion unit PD to an OFD region.

1 1 2 2 3 A control pulse φTXis supplied to the first charge transfer unit TX. A control pulse φTXis supplied to the second charge transfer unit TX. A control pulse φOFD is supplied to the OFD control unit TX. A control pulse φSEL is supplied to the gate of the selection transistor SEL. A control pulse φRES is supplied to the gate of the reset transistor RES.

1 FIG. The first pixel through the fifth pixel may have the same equivalent circuit. What is different between the first pixel through the fifth pixel is the shape of the light-shielding member disposed on the photoelectric conversion unit PD. Specifically, the shapes are different as illustrated in.

4 FIG.A 2 FIG. 4 FIG.B 4 FIG.A is a cross-sectional diagram illustrating the first pixel of the imaging apparatus in the present embodiment. This illustrates the cross-section of IVA-IVA in.is a diagram illustrating the potential of the parts illustrated in.

1 401 401 The photoelectric conversion unit PD, the first signal holding unit MEM, an FD region FD, and others are configured by disposing multiple N-type semiconductor regions in a P-type semiconductor region. The P-type semiconductor regionmay use a P-type semiconductor substrate, or may use a P-type semiconductor region formed by ion implantation in an N-type semiconductor substrate.

401 402 401 403 402 The photoelectric conversion unit PD includes a P-type conductor region, an N-type semiconductor regiondisposed to configure a PN junction with the P-type semiconductor region, and a P-type semiconductor regiondisposed on the N-type semiconductor region. The photoelectric conversion unit PD is configured as a so-called embedded photodiode.

1 404 404 401 401 The first charge transfer unit TXincludes a first control electrodeand a first channel disposed in the lower portion of the first control electrodevia an insulating layer. Here, the first channel is configured from a portion of the P-type semiconductor region. Further, the height of the potential barrier of the first channel is adjusted by implanting impurity ions in the P-type semiconductor region.

1 406 405 406 406 405 1 The first signal holding unit MEMis configured with the inclusion of a second control electrode, and an N-type semiconductor regiondisposed in the lower portion of the second control electrodevia an insulating layer. It is preferable if the voltage of the second control electrodeis controlled by negative voltage during accumulation in order to stop the generation of dark current on the face of the N-type semiconductor region. During transfers from the photoelectric conversion unit to the first signal holding unit MEM, the application of a positive voltage, when desired and appropriate, may improve transfer properties.

2 407 407 401 401 The second charge transfer unit TXincludes a third control electrodeand a second channel disposed in and the lower portion of the third control electrodevia an insulating layer. Here, the second channel is configured from a portion of the P-type semiconductor region. Further, the height of the potential barrier of the second channel may be adjusted by implanting impurity ions in the P-type semiconductor region.

408 408 409 The FD region FD includes an N-type semiconductor region. The N-type semiconductor regionis electrically connected to the gate of the amplification transistor SF via a plug.

4 411 411 401 401 The OFD control unit TXincludes a fourth control electrodeand a third channel disposed in the lower portion of the fourth control electrodevia an insulating layer. Here, the third channel is configured as a portion of the P-type semiconductor region. Further, the height of the potential barrier of the third channel may be adjusted by implanting impurity ions in the P-type semiconductor region.

412 412 413 The OFD region OFD includes an N-type semiconductor region. The N-type semiconductor regionis electrically connected to a power supply line via a plug.

410 1 406 406 410 410 404 404 411 2 411 A light-shielding memberis disposed on the first signal holding unit MEM. It is more desirable for the second control electrodeto be included in the orthogonal projection toward the second control electrodeof the light-shielding member. Further, it is preferable if the light-shielding memberis disposed so that it extends onto the first control electrodeuntil the side wall of the photoelectric conversion unit PD side of the first control electrode. Further, a light-shielding membermay extend to other members, or may extend onto the second charge transfer unit TXand the fourth control electrode.

4 FIG.B 1 1 2 is a diagram illustrating the potential state when non-electroconducting control pulses are supplied to the first control electrode through the fourth control electrode. That is to say, this is the state when the control pulse with the highest electron potential from among the control pulses supplied to the first control electrode through the fourth control electrode is supplied. Such a potential state is, for example, a period when, after signals from all pixels for the nth frame are transferred to the first signal holding unit MEMsimultaneously, electrons are accumulated in the photoelectric conversion unit PD and the first signal holding unit MEMduring a period until the second charge transfer unit TXis scanned per row.

5 FIG. 1 FIG. 4 FIG. 5 FIG. 101 101 101 101 101 101 101 101 101 is a total block diagram illustrating the imaging apparatus in the present example. The functions that are the same as those inthroughare denoted with the same reference numerals, and thus their descriptions are omitted here. Three rows by three columns of pixels are illustrated infor a total of 9 pixels, but many more pixels may be disposed. Also, regarding the arrangement of the first through the fifth pixels, the first pixel, the second pixela, and the third pixelb are disposed in the first row; and the first pixela, the fourth pixelc, and the fifth pixeld are disposed in the second row. Further, the first pixel, the second pixela, and the third pixelb are disposed in the third row.

501 500 The control pulses are supplied from a vertical scanning unitper pixel row, or at intervals of multiple pixel rows. The vertical scanning unitmay be configured with a shift register and an address decoder.

502 503 504 505 503 506 504 505 507 506 508 507 508 507 508 A column circuitis configured with multiple circuit blocks that correspond to each of the pixel rows. Each circuit block includes a first switchcontrolled by a control pulse φTS, and a second switchcontrolled by a control pulse φTN. Further, an optical signal holding unitis disposed downstream of the first switch, and a noise signal holding unitis disposed downstream of the second switch. Also, the optical signal holding unitis disposed downstream of a third switch, and the noise holding unitis disposed downstream of a fourth switch. The third switchand the fourth switchare controlled by a PHSEL. A horizontal signal line SENSOR_OUT_S is disposed downstream of the third switch, and a horizontal signal line SENSOR_OUT_N is disposed downstream of the fourth switch.

501 The signal transfer scenario for such a total block diagram will be described next. Multiple pixels included in a predetermined pixel row are reset, and during a period where noise signals may be output and multiple pixels in a predetermined pixel row are selectable by the vertical scanning unit, noise signals are output to the vertical signal line VOUT. The noise signals are offset noise from the pixel transistors or random noise. They may also be noise signals from the column circuit.

506 504 501 The noise signals transferred on the vertical signal line VOUT are held in the noise holding unitvia the second switch. Afterwards, the signals based on the charges generated by the photoelectric conversion units in the multiple pixels change to a state where they may be output. Also, during the period where the multiple pixels in the predetermined row are in a selectable state by the vertical scanning unit, an optical signal with the noise signals superimposed in the vertical signal line (hereafter, referred to simply as “optical signal”) is output.

505 503 The noise signals transferred on the vertical signal line VOUT are held in the noise holding unitvia the first switch. Afterwards, the optical signal and noise signal are output in phase to the horizontal output line SENSOR_OUT_S and SENSOR_OUT_N, by the third switch and the fourth switch being changed to an electroconductive state by the PHSEL per row or for intervals of multiple rows. Noise may be removed when these signals are processed by a signal processing circuit not illustrated.

6 FIG. illustrates more specific control pulses. All control pulses are at a high level and in an electroconductive state.

1 6 FIG. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 2 2 1 2 1 2 6 FIG. At the timing T, the φTX, φTX, φOFD of all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTX, φTX, φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the electrons in the photoelectric conversion unit PD and the first signal holding unit MEMto be drained to the reset transistor RES drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 1 4 1 1 At a timing T, the φTXof all pixels on the imaging face changes from a low level to a high level, and at a timing T, the φTXof all pixels on the imaging face changes from a high level to a low level. Such an operation enables the electrons in the photoelectric conversion unit PD for all pixels on the imaging face to be transferred simultaneously to the first signal holding MEM.

5 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and electrons generated by the illumination of light on the photoelectric conversion unit PD are drained to the OFD region.

6 1 1 Next, at a timing T, a φSEL_changes from a low level to a high level. At the same time, a φRES_changes from a high level to a low level. Such an operation enables pixel noise signals to be output to the vertical signal line VOUT.

7 8 506 At a timing T, a PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals for the first row of pixels to be held in the noise signal holding unitin the column circuit.

9 2 1 10 2 1 1 At a timing T, a φTX_changes from a low level to a high level. At a timing T, the φTX_changes from a high level to a low level. Such an operation enables electrons for the multiple pixels in the first row to be transferred from the first signal holding MEMto the gate of the amplification transistor SF.

11 12 505 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signal from the pixels in the first row to be held in the optical signal holding unitin the column circuit.

13 19 1 3 Next, at timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output line. This period is called the horizontal scanning period (horizontally enabled period). The optical signals and the noise signals are simultaneously output in units of rows.

20 1 21 33 At a timing T, a φSELchanges from a high level to a low level. The pixels in the first row change from a selectable state to a non-selectable state. In continuance, at timings Tthrough T, the signals from the pixels in the second row are read out in the same way as those in the first row.

34 35 Next, at timings from T, the signals from the pixels in the third row are read out. Regarding the present example, the exposure period of the next frame begins during the read out period of the pixels in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the electrons generated from light illuminated on the photoelectric conversion unit PD to be accumulated in the photoelectric conversion unit PD.

Such operations enable the implementation of a global electron shutter, and further, noise signals generated from each pixel may be removed via a downstream circuit not illustrated. Also, the focal point detection signals may be output while the next frame is accumulated.

7 FIG.A 7 FIG.B 7 FIG.A 1 1 1 1 1 is a cross-sectional diagram illustrating the first pixel in the second Example of the first Embodiment, andis a diagram illustrating the potential of the parts illustrated in. The key characteristic of the first Example is the height of the potential barrier between the photoelectric conversion unit PD and the first signal holding unit MEM. The configuration enables electrons to be transferred from the photoelectric conversion unit to the first signal holding unit MEMwhen the first charge transfer unit TX, which is disposed in the electrical pathway between the photoelectric conversion unit PD and the first signal holding unit MEM, is in a non-electroconductive state. Here, the non-electroconductive state is a state in which the generated potential barrier is supplied with the highest pulse value from among the pulse values to be supplied to the first charge transfer unit TX. Thus, it does not have to be so-called completely off, and so includes a state in which some sort of potential barrier has occurred as compared to a case where it is completely on.

1 1 1 1 As a specific configuration example, this may be implemented by using a MOS transistor as the first charge transfer unit TX, where this MOS transistor has an embedded channel. More generally, the configuration has a portion that is in a region deeper than the surface, and has an electron potential barrier lower than the surface when the first charge transfer unit TXis in a non-electroconductive state. In this case, the control pulse supplied to the first charge transfer unit TXmay be a fixed value. In other words, instead of a configuration that switches between an electroconductive state and a non-electroconductive state, a configuration with a fixed potential barrier may be used. When light is illuminated on the photoelectric conversion unit PD in such a configuration, the majority of electrons generated by the photoelectric conversion are transferred to the first signal holding unit MEMduring the exposure period. Thus, the accumulation period for all pixels on the imaging face may be aligned together.

1 When the first charge transfer unit TXis in a non-electroconductive state, a hole accumulates in a first channel face of the first charge transfer unit. Next, as electrons to be transferred are in the first channel, whose predetermined depth is deeper than that of the surface, the influence of dark current may be reduced as compared to when electrons are transferred on an insulating layer interface.

1 702 703 1 2 7 FIG.A 7 FIG.B The first charge transfer unit TXinincludes a first control electrodeand an N-type semiconductor region.is a diagram illustrating the potential of the state when the non-electroconductive control pulse is supplied to each control electrode. In other words, this is the state when the control pulse with the highest potential from among the control pulses to be supplied to each control electrode is supplied. This potential state is, for example, the period when, after the signals from the nth frame are transferred to the first signal holding unit MEM, electrons are accumulated at the photoelectric conversion unit PD and the first signal holding unit until the time that the second charge transfer unit TXscans each row.

4 1 703 Also, compared to the height of the potential barrier generated by the OFD control unit TX, the height of the potential barrier generated by the first charge transfer unit TXis lower. Such a configuration enables the N-type semiconductor regionto be disposed in proximity to the first channel.

8 FIG. 6 FIG. 6 FIG. 1 1 3 illustrates an example of control pulses for the imaging region of the imaging apparatus in the present example. The basic operation is the same as that of. Compared to the operation inhowever, the height of the potential barrier of the first charge transfer unit TXis lower. Thus, during the period in which electrons are held in the first signal holding unit MEM, the φOFD remains at a high level, which then is controlled to drain the electrons generated by the photoelectric conversion unit PD to the OFD region. Specifically, the timing T, which starts the exposure period of the N+1 frame, is set to execute after all pixel rows on the imaging face for the nth frame are read out.

1 405 1 Further, it is preferable if the low level state of the φTXis a negative voltage. This decreases dark current by gathering holes on the face of the N-type semiconductor regionof the first charge holding unit MEM.

9 FIG. is a top view of the imaging region of the imaging apparatus in the present example. The difference with the first Embodiment is that while different pixels are used to configure the imaging pixels and the focal point detection pixels for the first Embodiment, in the present example, the first pixel is divided with multiple photoelectric conversion units, and focal point detection is performed by using signals from these multiple photoelectric conversion units. The pixels here are imaging pixels of the smallest unit. For example, when including a microlens array that includes multiple microlenses, one microlens is the unit of measurement that represents one pixel. That is to say, this configuration includes multiple photoelectric conversion units to receive light condensed by one microlens, which is then able to extract the signals from each photoelectric conversion unit independently. Multiple methods to independently extract each signal may be conceived, and processing is performed at a downstream circuit to enable such a configuration.

9 FIG. 9 FIG. In, two photoelectric conversion units are disposed to correspond to a single microlens. This is illustrated as a first photoelectric conversion unit A and a second photoelectric conversion unit B. All pixels ininclude two photoelectric conversion units which are juxtaposed horizontally therein. However, they may be juxtaposed vertically as well, and pixels with photoelectric conversion units juxtaposed horizontally and pixels with photoelectric conversion units juxtaposed vertically may be mixed together.

10 FIG. is a top view of the pixels in the present example. Here, three adjacent pixels are illustrated. Many more pixels may be arranged.

1 10 FIG. The first photoelectric conversion unit PD_A is adjacent to the second photoelectric conversion unit PD_B, on which light condensed by the one mircrolens per unit is illuminated. Electrons generated at each photoelectric unit are transferred to and held at first signal holding units MEM_A and MEM_B via the first charge transfer unit TX. Other transistors and similar that configure pixel circuits are disposed in a region disposed in the lower section of. Electrons generated at the photoelectric conversion units PD_A and PD_B may be drained to the OFD region.

11 FIG. 10 FIG. is an equivalent circuit diagram illustrating the first pixel of the present example. The functions that are the same as those inare denoted with the same reference numerals, and thus their descriptions are omitted here. A circuit is provided for the first photoelectric conversion unit PD_A, and another circuit is provided for the second photoelectric conversion unit PD_B. Also, multiple vertical signal lines are provided for each pixel row. In the present example, two vertical signal lines are provided for each pixel row. Each of these operations is similar, and so only the pixel circuit for the first photoelectric conversion unit PD_A will be described.

1 An electron hole is generated when light illuminates on the photoelectric conversion unit PD_A. The first charge transfer unit TX_A is disposed in an electrical pathway between the first photoelectric conversion unit PD_A and the first signal holding unit MEM_A.

2 1 The electrons held at the first signal holding unit MEM_A are transferred to an input node of an amplification transistor SF_A via a second charge transfer unit TX_A. The input node includes an FD. The selection transistor SEL is disposed in an electrical pathway between the amplification transistor SF_A and a vertical signal line VOUT_A. Pixels read out to the vertical signal line VOUT_A are selected by the selection transistor SEL_A. A reset transistor RES_A performs resets by supplying a reference voltage to the input node of the amplification transistor SF_A. An OFD control unit OFD_A drains electrons generated at the first photoelectric conversion unit PD_A to the OFD region. Particularly, it is preferable if the OFD control unit OFD_A operates when during the period when signal charges for generating the focal point detection signals are accumulating at the first signal unit MEM.

1 1 2 2 The control pulse φTXis supplied to the first charge transfer unit TX_A. The control pulse φTXis supplied to the first charge transfer unit TX. The control pulse φOFD is supplied to the OFD control unit OFD_A. The control pulse φSEL is supplied to the gate of the selection transistor SEL_A. The control pulse φRES is supplied to the gate of the reset transistor RES_A.

It should be noted here that the control pulse supplied to each control electrode and transistor is shared for the same pixel row. Such a configuration enables high speed read out of signals as it is possible to read out focal point detection signals on multiple vertical signal lines in parallel. Also, imaging signals are obtained by first being read out to vertical signal lines VOUT_A and VOUT_B, and then added or averaged at a signal processing unit.

12 FIG.A 10 FIG. 12 FIG.B 12 FIG.A is a cross-sectional diagram illustrating a portion of the pixel configuration corresponding to the first photoelectric conversion unit PD_A in the present example. The cross sections ofEX II AthroughFX II Ainare illustrated.is a diagram illustrating the potential of the parts illustrated in. The pixel configuration for the second photoelectric conversion unit PD_B is basically the same, and accordingly description will be made only with additional notes where desirable.

1201 1201 The photoelectric conversion units PD_A and PD_B, the first signal holding units MEM_A and MEM_B, and the FD region are configured by the disposing of multiple N-type semiconductor regions in a P-type semiconductor region. The P-type semiconductor regionmay use a P-type semiconductor substrate, or a P-type semiconductor formed by ion implantation into an N-type semiconductor substrate.

1201 402 401 403 402 The photoelectric conversion unit PD_A includes the P-type semiconductor region, the N-type semiconductor regiondisposed to configure the PN junction with the −type semiconductor region, and the P-type semiconductor regiondisposed on the N-type semiconductor region. The photoelectric conversion unit PD is configured as a so-called embedded photodiode.

1 1204 1204 1201 1201 The first charge transfer unit TX_A includes a first control electrodeand a first channel disposed in the lower portion of the first control electrodevia an insulating layer. The first channel is configured as a portion of the P-type semiconductor region. Further, the height of the potential barrier of the first channel may be adjusted by implanting impurity ions in the P-type semiconductor region.

1206 1205 1206 The first signal holding unit MEM_A includes a second control electrodeand an N-type semiconductor regiondisposed in the lower portion of the second control electrodevia and an insulating layer.

2 1207 1207 1201 1201 The second charge transfer unit TX_A includes a third control electrodeand a second channel disposed in the lower portion of the third control electrodevia an insulating layer. The second channel is configured as a portion of the P-type semiconductor region. Further, the height of the potential barrier of the second channel may be adjusted by implanting impurity ions in the P-type semiconductor region.

408 408 1209 The FD region includes an N-type semiconductor region. The N-type semiconductor regionis electrically connected to the gate of the amplification transistor via a plug.

1211 1211 1201 1201 The OFD control unit OFD_A includes a fourth control electrodeand a third channel disposed in the lower portion of the fourth control electrodevia an insulating layer. The third channel is configured as a portion of the P-type semiconductor region. Further, the height of the potential barrier of the third channel may be adjusted by implanting impurity ions in the P-type semiconductor region.

1212 1212 1213 The OFD region includes an N-type semiconductor region. The N-type semiconductor regionis electrically connected to a power supply line via a plug.

1210 1206 1206 1210 1210 1204 1204 1211 2 1211 A light-shielding memberis disposed on the first signal holding unit MEM_A. It is more desirable for the second control electrodeto be included in the orthogonal projection toward the second control electrodeof the light-shielding member. Further, it is preferable if the light-shielding memberis disposed so that it extends onto the first control electrodeuntil the side wall of the photoelectric conversion unit PD_A side of the first control electrode. Further, a light-shielding membermay extend to other members, or may extend onto the second charge transfer unit TX_A and the fourth control electrode.

12 FIG.B 2 is a diagram illustrating the potential state when non-electroconducting control pulses are supplied to the first control electrode through the fourth control electrode. That is to say, this is the state when the control pulse with the highest electron potential from among the control pulses supplied to the first control electrode through the fourth control electrode is supplied. Such a potential state is, for example, a period when, after signals from all pixels for the nth frame are transferred to the first signal holding unit MEM_A simultaneously, electrons are accumulated in the photoelectric conversion unit PD_A and the first signal holding unit MEM_A during a period until the second charge transfer unit TX_A is scanned per row.

12 FIG.B 1 As can be seen from, the height of the potential barrier generated by the first charge transfer unit TXis low. As for relative relationships, for example, this potential barrier is even lower than the potential barrier generated by the OFD control unit.

13 FIG. 13 FIG. is a total block diagram illustrating the imaging apparatus of the present example. Three rows by three columns of pixels are illustrated infor a total of 9 pixels, but many more pixels may be disposed.

1301 1300 1302 Multiple pixelsare disposed in an imaging region. Control pulses are supplied from a vertical scanning unitper pixel row or for intervals of multiple pixel rows. It is preferable if pulses are sent at the same timing to the circuits corresponding to both the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B, both of which are included in the same pixel.

1302 The vertical scanning unitmay be configured with a shift register and an address decoder.

1303 1304 1304 1305 1305 1306 1306 1304 1304 1307 1307 1305 1305 1306 1306 1308 1308 1307 1307 1309 1309 A column circuitis configured with multiple circuit blocks that correspond to each of the pixel rows. Each circuit block includes first switches_A and_B controlled by a control pulse φTS, and second switches_A and_B controlled by a control pulse φTN. Further, optical signal holding units_A and_B are disposed downstream of the first switches_A and_B. Noise signal holding units_A and_B are disposed downstream of the second switches_A and_B. Also, the optical signal holding units_A and_B are disposed downstream of third switches_A and_B, and the noise holding units_A and_B are disposed downstream of fourth switches_A and_B.

1308 1308 1309 1309 1308 1308 1309 1309 The third switches_A and_B and the fourth switches_A and_B are controlled by a PHSEL. Horizontal signal lines SENSOR_OUT_S_A and SENSOR_OUT_S_B are disposed downstream of the third switches_A and_B. Horizontal signal lines SENSOR_OUT_N_A and SENSOR_OUT_N_B are disposed downstream of the fourth switches_A and_B.

1302 The signal transfer scenario for such a total block diagram will be described next. The photoelectric conversion units PD_A and PD_B in multiple pixels included in a predetermined pixel row are reset to enable a period where noise signals may be output. Next, during a period where multiple pixels in a predetermined pixel row are selectable by the vertical scanning unit, noise signals are output to the vertical signal lines VOUT_A and VOUT_B. These noise signals are output to the vertical noise signal lines VOUT_A and VOUT_B nearly simultaneously.

The noise signals are offset noise from the pixel transistors corresponding to each photoelectric conversion unit, or random noise. They may also be noise signals from the column circuit.

1307 1307 1305 1305 1302 The noise signals transferred on the vertical signal lines VOUT_A and VOUT_B are held in the noise holding units_A and_B via the second switches_A and_B nearly simultaneously. Afterwards, the signals based on the charge generated at the photoelectric conversion units PD_A and PD_B of the multiple pixels included in the predetermined pixel row change to a state where they may be output. Also, during the period where the multiple pixels in the predetermined row are in a selectable state by the vertical scanning unit, an optical signal with the noise signals superimposed in the vertical signal line (hereafter, referred to simply as “optical signal”) is output to the vertical signal lines VOUT_A and VOUT_B nearly simultaneously.

1306 1306 1304 1304 The optical signals transferred on the vertical signal lines VOUT_A and VOUT_B are held in the optical signal holding units_A and_B via the first switches_A and_B nearly simultaneously. Afterwards, the optical signal and noise signal are output in phase to corresponding horizontal output lines, by the third switch and the fourth switch being changed to an electroconductive state by the PHSEL per row or for intervals of multiple rows. Noise may be removed when this signal is processed by a signal processing circuit not illustrated.

14 FIG. illustrates more specific control pulses. All control pulses are at a high level and in an electroconductive state.

1 14 FIG. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level. Also, a shared control pulse is supplied to each circuit element which has the same function as that of the pixel circuits for the first photoelectric conversion unit PD_A and the pixel circuits for the second photoelectric conversion unit PD_B for the same pixel row. That is to say, for the same pixel row, the signals from the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B are simultaneously output to the vertical signal lines VOUT_A and VOUT_B.

1 1 2 2 1 2 2 14 FIG. At the timing T, the φTX, φTX, φOFD of all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTX, φTX, φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the electrons in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, and the first signal holding units MEM_A and MEM_B to be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 1 4 1 At a timing T, the φTXof all pixels on the imaging face changes from a low level to a high level, and at a timing T, the φTXof all pixels on the imaging face changes from a high level to a low level. Such an operation enables the electrons in the photoelectric conversion unit PD_A to be transferred to the first signal holding unit MEM_A, for all pixels on the imaging face simultaneously. Similarly, the electrons in the second photoelectric conversion unit PD_B are transferred to the first signal holding unit MEM_B, for all pixels on the imaging face simultaneously.

5 1 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and electrons generated by the light illuminated on the photoelectric conversion units PD_A and PD_B are drained to the OFD region. The OFD operation should be run period when signal charges for generating focal point detection signals are held in the first signal holding unit MEM.

6 1 1 Next, at a timing T, a φSEL_changes from a low level to a high level, and at the same time, a φRES_changes from a high level to a low level. Such an operation enables pixel noise signals to be output to the vertical signal lines VOUT_A and VOUT_B.

7 8 At a timing T, a PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals for the first row of pixels to be held in the noise signal holding units in the column circuit.

9 2 1 10 2 1 At a timing T, a φTX_changes from a low level to a high level, and at a timing T, the φTX_changes from a high level to a low level. Such an operation enables signal charges from the multiple pixels in the first row to be transferred from the first signal holding units MEM_A and MEM_B to the input node of the amplification transistors SF_A and SF_B.

11 12 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signal for focal point detection from the pixels in the first row to be held in the optical signal holding units in the column circuit. Noise signals are superimposed in these optical signals for focal point detection.

13 19 1 3 Next, at timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period).

20 1 21 33 At a timing T, a φSELchanges from a high level to a low level. The pixels in the first row change from a selectable state to a non-selectable state. In continuance, during the period of timings Tthrough T, the signals from the pixels in the second row are read out in the same way as those in the first row.

34 35 Next, at timings from T, the signals from the focal point detecting pixels in the third row are read out. Regarding the present example, the exposure period of the next frame begins during the read out period of the signals for focal point detection from the pixels in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals, which are generated from light illuminated on the photoelectric conversion units PD_A and PD_B, to be accumulated in the photoelectric conversion units PD_A and PD_B.

Such operations enable the implementation of a global electron shutter, and further, noise signals generated from each pixel may be removed via a downstream circuit not illustrated.

15 FIG. 10 FIG. 15 FIG. 15 FIG. is a diagram illustrating the potential ofGX VthroughHX Villustrated in.describes the magnitude relationship between the potentials of the photoelectric conversion units PD_A and PD_B for the 3 adjacent pixels, and of regions between these units. As can be seen from, the height of the potentials generated by the regions between the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B in the same pixel are lower than the height of potentials generated by regions between photoelectric conversion units of different pixels which have multiple photoelectric conversion units that are adjacent to each other.

15 FIG. The suffix numbers denoting the photoelectric conversion units inindicate which pixel each unit is included in, and so photoelectric conversion units with the same suffix number belong to the same pixel. Units with different numbers belong to different pixels.

15 FIG. 15 FIG. 1 2 2 3 2 2 1 1 2 2 1 2 Three adjacent pixels are illustrated in. Let us say that from the left, these are a first pixel, a second pixel, and a third pixel respectively. Illustrated inare a second photoelectric conversion unit PD_B_of the first pixel, a first photoelectric conversion unit PD_A_and a second photoelectric conversion unit PD_B_of the second pixel, and a first photoelectric conversion unit PD_A_of the third pixel. The region between the first photoelectric conversion unit PD_A_and the second photoelectric conversion unit PD_B_included in the same pixel (the second pixel) is illustrated as ISO. The regions (second regions) between the photoelectric conversion units (PD_B_and PD_A_) adjacent to the photoelectric conversion units of different pixels (first pixel and second pixel, for example) are illustrated as ISO. Also, the minimum values for the potentials in the pathway are illustrated. The height of the potential of the first region ISOis lower than the height of the potential of the second region ISO. Such a relationship between potentials has the following advantages.

2 2 2 2 1 2 2 1 2 Let us say that, for example, at least the first photoelectric conversion unit PD_A_is saturated by the difference in sensitivity and the difference in luminance between the first photoelectric conversion unit PD_A_and the second photoelectric conversion unit PD_B_, which are adjacent to each other and included in the same pixel. At such a time, a portion of the charge generated at the first photoelectric conversion unit PD_A_crosses the potential barrier generated by the first region ISO, and transfers to the second photoelectric conversion unit PD_B_. Not only this, the charge generated at the first photoelectric conversion unit PD_A_will also transfer to the photoelectric conversion unit PD_B_. Further, this charge will also transfer to a transistor array region disposed adjacent to the first photoelectric conversion unit PD_A_not illustrated.

2 2 2 2 2 2 2 2 15 FIG. When the first photoelectric conversion unit PD_A_is saturated, but the second photoelectric conversion unit PD_B_is not saturated, signals that have a linearity in accordance with the incident light are output from the second photoelectric conversion unit PD_B_alone. For this reason, when these signals are combined, the combined output is determined by the output of the second photoelectric conversion unit PD_B_from the point where the first photoelectric conversion unit PD_A_is saturated, and as a result, the combined output ends up having a knee characteristic from the point that the first photoelectric conversion unit PD_A_is saturated. This phenomenon is noticeable when the charge generated after the first photoelectric conversion unit PD_A_becomes saturated leaks to parts other than the PD_B_. This type of phenomenon may cause situations where the desired combined signal is not obtainable. By implementing a potential state such as that illustrated into counter this type of phenomenon, charge transfers more readily to the adjacent photoelectric conversion unit of the same pixel, and so a desirable combined signal may be obtained.

16 FIG. 10 FIG. 16 FIG. 15 FIG. is a diagram illustrating the potential ofIX VIthroughJX VIillustrated in.describes the magnitude relationship between the potentials of the first signal holding units for the 3 adjacent pixels, and of regions between these units. The suffix number represents the same information as that of.

2 2 3 4 3 4 3 4 The region (the third region) between the first signal holding unit MEM_A_and the first signal holding unit MEM_B_included in the same pixel is illustrated as ISO. The regions between the first signal holding units adjacent to the first signal holding units of different pixels are illustrated as ISO. The height of the potential of the third region ISOis the same as the height of the potential of the fourth region ISO. That is to say, the potential between the first signal holding units of the same pixel and between those that are adjacent but belonging to different pixels does not change. This is because whether the space between the first signal holding units is the space between multiple first signal holding units of the same pixel, or whether it is the space between the first signal holding units that are adjacent but belonging to different pixels, it is desirable to maintain independence between these signals. Particularly when using a global electron shutter operation, if the height of the potential barriers between the third region ISOand the fourth region ISOis changed, one portion in the imaging face will be different when signals are read out, and this will cause the degree of signal mixing to change.

3 4 3 4 2 Further, it is preferable if the height of the potential between the third region ISOand the fourth region ISOis higher than the height of the first region. Further, it is preferable if the height of the potential between the third region ISOand the fourth region ISOis the same as the height of the potential of the second region ISO.

17 FIG. 10 FIG. 10 FIG. is a cross-sectional diagram illustrating the potential ofIX VIIthroughJX VIIillustrated in. The portions that have the same functions as those inare denoted with the same reference numerals, and thus their descriptions are omitted here.

1701 1701 Each of the multiple first signal holding units include multiple N-type semiconductor regions disposed in a P-type semiconductor region. The P-type semiconductor regionmay use a P-type semiconductor substrate, or may use a P-type semiconductor region formed by ion implantation in an N-type semiconductor substrate.

1 1702 1 2 1702 2 2 1702 2 3 1702 3 1702 1 1702 2 1702 2 1702 3 1701 The first signal holding unit MEM_B_includes an N-type semiconductor regionB_, and the first signal holding unit MEM_A_includes an N-type semiconductor regionA_. Further, the first signal holding unit MEM_B_includes an N-type semiconductor regionB_, and the first signal holding unit MEM_A_includes an N-type semiconductor regionA_. The N-type semiconductor regionsB_,A_,B_, andA_are configured with a PN junction to the P-type semiconductor region. Further, a P-type semiconductor region may be disposed on the face of each N-type semiconductor region.

3 1703 3 The third region ISOincludes a P-type semiconductor region_disposed next to an isolating region SiO2 via an insulating layer. This may use the so-called channel stop region.

4 1703 4 The fourth region ISOincludes a P-type semiconductor region_disposed next to an isolating region SiO2 via an insulating layer. This may use the so-called channel stop region.

1 2 1705 1705 1702 1 1702 2 3 1702 1 1702 2 17 FIG. The first charge transfer unit TX_includes a control electrode. The control electrodeis disposed continuously on the N-type semiconductor regionsA_andA_via an insulating layer. As illustrated in, this may be disposed on the third region ISO, which is disposed between the N-type semiconductor regionsA_andA_.

1 2 1706 1706 1705 The first charge transfer unit TX_includes a control electrode. The control electrodemay be disposed in the same way as the control electrode, which is continuously on the N-type semiconductor regions that correspond to each of the multiple first signal holding units included in the same pixel.

17 FIG. 3 4 According to the configuration in, the height of the potential for the third region ISOand the fourth region ISOmay readily be raised due to the provision of element isolating regions, which are implemented via insulating layers.

18 FIG. 10 FIG. 10 FIG. 17 FIG. 3 4 illustrates an example of another cross-section ofIX VIIIthroughJX VIIIillustrated in. The portions that have the same functions as those inare denoted with the same reference numerals, and thus their descriptions are omitted here. The biggest difference from the configuration inis the configuration of the third region ISOand the fourth region ISO. Specifically, the element isolating region implemented via the insulating layers are not provisioned, and so the configuration only contains the semiconductor regions.

1801 1801 Each of the multiple first signal holding units includes multiple N-type semiconductor regions disposed in a P-type semiconductor region. The P-type semiconductor regionmay use a P-type semiconductor substrate, or may use a P-type semiconductor region formed by ion implantation in an N-type semiconductor substrate.

1 1802 1 2 1802 2 2 1802 2 3 1802 3 1802 1 1802 2 1802 2 1802 3 1801 The first signal holding unit MEM_B_includes an N-type semiconductor regionB_, and the first signal holding unit MEM_A_includes an N-type semiconductor regionA_. The first signal holding unit MEM_B_includes an N-type semiconductor regionB_, and the first signal holding unit MEM_A_includes an N-type semiconductor regionA_. The N-type semiconductor regionsB_,A_,B_, andA_are configured with a PN junction to the P-type semiconductor region. Further, a P-type semiconductor region may be disposed on the face of each N-type semiconductor region.

3 1803 3 18 FIG. The third region ISOincludes a P-type semiconductor region_. Here, one of the semiconductor regions may be configured from multiple regions disposed with different depths as illustrated in.

4 1803 4 3 The fourth region ISOincludes a P-type semiconductor region_. Similar to the third region ISO, this may be configured from regions disposed with different depths via multiple processes.

1 2 1805 1805 1805 1802 2 1805 1802 2 The first charge transfer unit TX_includes control electrodesA andB. The control electrodeA is disposed on the N-type semiconductor regionA_via an insulating layer. The control electrodeB is disposed on the N-type semiconductor regionB_via an insulating layer.

1 1 1 3 1806 1806 The first charge transfer units TX_and TX_each include a control electrode. The control electrodeis disposed on an N-type semiconductor region which configures the corresponding first signal holding unit.

18 FIG. According to the configuration in, there are few depressions on the surface of the semiconductor substrate, and so it is easy to dispose light-shielding members. Also, illumination of light transmitted through insulating layers, which would be disposed between adjacent pixels, may be prevented even without any coating of a light-shielding layer thus improving light-shielding properties. Also, the element isolating unit electrodes are eliminated, which decreases the area of holding unit electrodes, and this enables relatively high-speed propagation of driving pulses.

19 FIG. 11 FIG. 11 FIG. 2 2 illustrates an example of an equivalent circuit for a pixel in the first Example of the second Embodiment. The portions that have the same functions as those inare denoted with the same reference numerals, and thus their descriptions are omitted here. The difference between the present example and the example inis that the amplification transistor SF is shared between the multiple photoelectric conversion units PD_A and PD_B of the same pixel. Thus, it is desirable to have a configuration where the second charge transfer unit TX_A corresponding to the first photoelectric conversion unit PD_A and the second charge transfer unit TX_B corresponding to the first photoelectric conversion unit PD_B are independently controllable.

20 FIG. 20 FIG. 20 FIG. is a diagram illustrating control pulses for the imaging apparatus in the present example. The driving pulses illustrated infor this example are signals from the multiple photoelectric conversion units of the same pixel which are added at the input node of the amplification transistor. Further, a pulse PTS is a control pulse used when signals are held in the photoelectric conversion unit disposed in the column circuit. A pulse PTN is a control pulse used when signals are held in the noise signal holding unit disposed in the column circuit. A pulse PHSEL is a control pulse output from the horizontal scanning circuit, and is used for the read out of signals from each row held in the column circuit to the horizontal signal lines. The driving pulses inmay be used in a still image mode.

1 20 FIG. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 2 2 2 1 2 2 At the timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a high level to a low level.

2 20 FIG. Such an operation enables the electrons in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, and the first signal holding units MEM_A and MEM_B to be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 1 4 1 At a timing T, the φTXof all pixels on the imaging face changes from a low level to a high level, and at a timing T, the φTXof all pixels on the imaging face changes from a high level to a low level. Such an operation enables the signal charges for imaging in the first photoelectric conversion unit PD_A to be transferred to the first signal holding MEM_A, for all pixels on the imaging face simultaneously. Similarly, the signal charges for imaging in the second photoelectric conversion unit PD_B are transferred to the first signal holding unit MEM_B, for all pixels on the imaging face simultaneously.

5 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and signal charges generated by light illuminated on the photoelectric conversion units PD_A and PD_B are drained to the OFD region.

6 1 1 Next, at a timing T, a φSEL_changes from a low level to a high level, and at the same time, a φRES_changes from a high level to a low level. Such an operation enables a state where noise signals may be output to the vertical signal line VOUT.

7 8 At a timing T, a PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals for the first row of pixels to be held in the noise signal holding units in the column circuit.

9 2 1 2 1 10 2 1 2 1 At a timing T, a φTX_A_and a φTX_B_change from a low level to a high level, and at a timing T, the φTX_A_and the φTX_B_change from a high level to a low level. Such an operation enables electrons from the multiple pixels in the first row to be transferred from the first signal holding units MEM_A and MEM_B to the input node of the amplification transistors SF, and then added.

11 12 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signal for imaging from the pixels in the first row to be held in the optical signal holding units in the column circuit.

13 18 1 3 Next, at timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period).

19 1 20 34 At a timing T, a φSELchanges from a high level to a low level, and the pixels in the first row change from a selectable state to a non-selectable state. In continuance, at timings Tthrough T, the signals from the pixels in the second row are read out in the same way as those in the first row.

34 35 Next, at timings from T, the signals from the pixels in the third row are read out. Regarding the present example, the exposure period of the next frame begins during the read out period of the imaging signals in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the signal charges generated from light illuminated on the photoelectric conversion units PD_A and PD_B to be accumulated in the photoelectric conversion units PD_A and PD_B. Such operations enable the implementation of a global electron shutter, and further, noise signals may be removed via a downstream circuit not illustrated.

21 21 FIGS.A andB 20 FIG. Next,are diagrams illustrating the driving pulses that are used for the output of focal point detection signals. The biggest difference as compared to the driving pulses inis that signals from the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B of the same pixel are independently read out to the vertical signal lines. The following describes the driving pulses focusing on this point in detail.

1 8 1 34 35 20 FIG. 21 21 FIGS.A andB 21 FIG.A 21 FIG.B The period of timings Tthrough Tis the same as that of, and so description thereof is omitted here.combine to form one diagram of the driving pulses where timings Tthrough Tare illustrated inand timings from Tare illustrated in.

9 2 1 10 2 1 At a timing T, a φTX_A_changes from a low level to a high level, and at a timing T, the φTX_A_changes from a high level to a low level. Such an operation enables signal charges for generating focal point detection signals from the multiple pixels in the first row to be transferred from the first signal holding unit MEM_A to the input node of the amplification transistor SF.

11 12 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signals for generating focal point detection signals from the first photoelectric conversion unit PD_A in the pixels in the first row to be held in the optical signal holding units in the column circuit.

13 18 1 3 Next, at timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period).

19 1 1 20 1 1 At a timing T, a φSELchanges from a high level to a low level, and a φRESchanges from a low level to a high level, and at a timing T, the φSELchanges from a low level to a high level, and the φRESchanges from a high level to a low level. Such an operation enables the pixels in the first row to be temporarily changed to a non-selectable state. Also, a floating state results after the voltage of the input node in the amplification transistor is reset to the reference voltage. Such an operation enables the signals of the pixels in the first row to be output again to the vertical signal lines.

21 22 At a timing T, the PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals from the first row to be held in the noise signal holding units in the column circuit.

23 2 1 24 2 1 At a timing T, a φTX_B_changes from a low level to a high level, and at a timing T, the φTX_B_changes from a high level to a low level. Such an operation enables signal charges for focal point detection from the multiple pixels in the first row to be transferred from the first signal holding unit MEM_B to the input node of the amplification transistor SF.

25 26 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signals for generating focal point detection signals from the second photoelectric conversion unit PD_B in the pixels in the first row to be held in the optical signal holding units in the column circuit.

27 32 1 3 Next, at timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines.

33 1 At a timing T, the φSELchanges from a high level to a low level. The pixels in the first row change from a selectable state to a non-selectable state. Such an operation enables the completion of the read out of focal point detection signals of the pixels in the first row.

34 62 Next, at timings Tthrough T, the focal point detection signals from the pixels in the second row are read out in the same way as with the first row.

63 Regarding the present example, the exposure period of the next frame begins during the read out period of the signals for focal point detection from the pixels in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals generated from light illuminated on the photoelectric conversion units PD_A and PD_B to be accumulated in the photoelectric conversion units PD_A and PD_B.

22 FIG. is a cross-sectional diagram illustrating the imaging apparatus in the present example. Regarding the cross sections that have been described until this point, the OFD regions have been disposed in the photoelectric conversion units laterally, i.e., a lateral overflow drain (LOFD) structure. The present example uses a different configuration which employs a vertical overflow drain (VOFD).

2201 2202 2201 2203 2202 2204 2203 2205 2204 2203 2204 2205 Power supply voltage is supplied to an N-type semiconductor region, which functions as the VOFD region. A P-type semiconductor regionis disposed on the N-type semiconductor region. A P-type semiconductor regionis disposed on the P-type semiconductor region. An N-type semiconductor regionis disposed here to configure a PN junction with the P-type semiconductor region, and a P-type semiconductor regionis also disposed on the N-type semiconductor region. The photoelectric conversion unit PD is configured from the P-type semiconductor region, the N-type semiconductor region, and the P-type semiconductor region. This is a so-called embedded type of photodiode.

1 2211 2206 2206 2203 The first charge transfer unit TXis configured with a control electrodeand a first channeldisposed in the lower portion of the control electrode via an insulating layer. The first channelis configured from a portion of the P-type semiconductor region. Further, the height of the potential barrier may be adjusted by the implantation of impurity ions.

1 2211 2207 2211 2207 1 The first signal holding unit MEMis configured with the control electrodeand an N-type semiconductor regiondisposed in the lower portion of the control electrodevia an insulating layer. Negative voltage is supplied to the control electrode to gather holes on the face of the N-type semiconductor region, which enables the reduction of dark current during the signal holding period at the first signal holding unit MEM.

2 2212 2208 2212 2208 2203 The second charge transfer unit TXis configured with a control electrodeand a second channeldisposed in the lower portion of the control electrodevia an insulating layer. The second channelis configured from a portion of the P-type semiconductor region. Further, the height of the potential barrier may be adjusted by the implantation of impurity ions.

2209 2209 2210 The FD is configured from an N-type semiconductor region. The N-type semiconductor regionis electrically connected to the gate of the amplification transistor via a plug.

2213 1 2211 A light-shielding memberis disposed on the first signal holding unit MEM. It is more preferable if this extends to the photoelectric conversion unit side of the control electrode.

2201 2202 2204 2201 1 2201 2204 2201 2207 2201 2207 2201 2207 2201 2204 The operation of the VOFD is performed by the changing of the relationship of the potential of the N-type semiconductor regionand P-type semiconductor regionby bias applied externally. Electrons in the N-type semiconductor regionare drained to the N-type semiconductor region. At this time, it is preferable that electrons held at the first signal holding unit MEMare not drained. That is to say, it is preferable for the transfer of electrons between the N-type semiconductor regionand the N-type semiconductor regionto be performed less readily than the transfer of electrons between the N-type semiconductor regionand the N-type semiconductor region. As a specific implementation method, a potential barrier may be provisioned between the N-type semiconductor regionand the N-type semiconductor region. Further, the distance between the N-type semiconductor regionand the N-type semiconductor regionmay be longer than the distance between the N-type semiconductor regionand the N-type semiconductor region.

23 FIG. 1 1 is a cross-sectional diagram illustrating the imaging apparatus of the present example. The difference between the present example and the configurations explained until this point is the height of the potential barrier between the photoelectric conversion unit PD and the first signal holding unit MEM. In other words, the configuration of the first charge transfer unit TXis different.

1 1 1 1 The configuration enables electrons to be transferred from the photoelectric conversion unit PD to the first signal holding unit MEMwhen the first charge transfer unit TX, which is disposed in the electrical pathway between the photoelectric conversion unit PD and the first signal holding unit MEM, is in a non-electroconductive state. Here, the non-electroconductive state is a state in which the generated potential barrier is supplied with the highest pulse value from among the pulse values to be supplied to the first charge transfer unit TX. Thus, it does not have to be so-called completely off, and so includes a state in which some sort of potential barrier has occurred as compared to a case where it is completely on.

1 1 1 1 As a specific configuration example, this may be implemented if a MOS transistor is used as the first charge transfer unit TX, and this MOS transistor has an embedded channel. More generally, the configuration has a portion that is in a region deeper than the surface, and has an electron potential barrier lower than the surface when the first charge transfer unit TXis in a non-electroconductive state. In this case, the control pulse supplied to the first charge transfer unit TXmay be a fixed value. In other words, instead of a configuration that switches between an electroconductive state and a non-electroconductive state, a configuration with a fixed potential barrier may be used. When light is illuminated on the photoelectric conversion unit PD in such a configuration, the greater part of the charge for generating signals for focal point detection, generated by the photoelectric conversion, is transferred to the first signal holding unit MEMduring the exposure period. Thus, the accumulation period for all pixels on the imaging face may be aligned together.

1 Further, when the first charge transfer unit TXis in a non-electroconductive state, a hole accumulates on the face. Next, as electrons to be transferred are in the channel, whose predetermined depth is deeper than that of the surface, the influence of dark current may be reduced as compared to when electrons are transferred on an insulating layer interface.

23 FIG.A 23 FIG.A 2301 2301 Regarding, photoelectric conversion units PD_A and PD_B, the first signal holding units MEM_A and MEM_B, and the FD region are configured by the disposing of multiple N-type semiconductor regions on the P-type semiconductor region. A P-type semiconductor regionmay use a P-type semiconductor substrate, or may use a P-type semiconductor region formed by ion implantation in an N-type semiconductor substrate. Only the first photoelectric conversion unit PD_A and related circuit parts are illustrated in.

2301 2302 2301 2303 2302 The photoelectric conversion unit PD includes the P-type semiconductor region, an N-type semiconductor regiondisposed to configure a PN junction with the P-type semiconductor region, and a P-type semiconductor regionthat is disposed on the N-type semiconductor region. This is a so-called embedded type of photodiode.

1 2312 2312 2304 The first charge transfer unit TXincludes a first control electrodeand a first channel disposed in the lower portion of the first control electrodevia an insulating layer. Here, the first channel is configured from an N-type semiconductor region.

2312 2305 2312 The first signal holding unit MEM includes the first control electrode, and an N-type semiconductor regiondisposed in the lower portion of the first control electrodevia an insulating layer.

2 2313 2306 2313 2306 2301 2306 2301 The second charge transfer unit TXincludes a control electrodeand a second channeldisposed in the lower portion of the second electrodevia an insulating layer. Here, the second channelis configured as a portion of the P-type semiconductor region. Further, the height of the electron potential barrier of the second channelis adjusted by implanting impurity ions in the P-type semiconductor region.

2307 2307 2308 The FD region includes an N-type semiconductor region. The N-type semiconductor regionis electrically connected to the gate of the amplification transistor via a plug.

3 2314 2309 2314 2309 2301 2309 2301 The OFD control unit TXincludes a third control electrodeand a third channeldisposed in the lower portion of the third control electrodevia an insulating layer. Here, the third channelis configured as a portion of the P-type semiconductor region. Further, the height of the electron potential barrier of the third channelis adjusted by implanting impurity ions in the P-type semiconductor region.

2310 2310 2311 The OFD region includes an N-type semiconductor region. The N-type semiconductor regionis electrically connected to a power supply line via a plug.

2315 2312 2312 2315 2315 2312 2312 2315 2 2314 A light-shielding memberis disposed on the first signal holding unit MEM. It is more desirable for the first control electrodeto be included in the orthogonal projection toward the first control electrodeof the light-shielding member. Further, it is preferable if the light-shielding memberis disposed so that it extends onto the first control electrodeuntil the side wall of the photoelectric conversion unit MEM side of the first control electrode. Further, the light-shielding membermay extend to other members, or may extend onto the second charge transfer unit TXand the third control electrode.

23 FIG.B 2 is a diagram illustrating the potential state when non-electroconducting control pulses are supplied to the first control electrode through the third control electrode. That is to say, this is the state when the control pulse with the highest electron potential from among the control pulses supplied to the first control electrode through the third control electrode is supplied. Such a potential state is, for example, a period when, after signals from all pixels for the nth frame are transferred to the first signal holding unit MEM simultaneously, electrons from the nth+1 frame are accumulated in the photoelectric conversion unit PD during a period until the second charge transfer unit TXis scanned per row.

23 FIG.B 1 3 As can be seen from, the height of the potential barrier generated by the first charge transfer unit TXis low. As for relative relationships, for example, this potential barrier is even lower than the potential barrier generated by the OFD control unit TX.

14 20 21 21 FIGS.,,A, andB 3 1 1 The driving pulses mainly illustrated inmay be used for this kind of pixel driving, depending on the pixel circuit. However, the difference between these driving pulses is that the OFD control unit TXfor all pixels on the imaging face has to be in an electroconductive state during the period when signals are held at the first signal holding unit MEM. This is preferable as such an operation enables the suppression of electrons in the first signal holding unit MEMfrom becoming contaminated.

24 FIG. 25 FIG. 1 is a top view of the first pixel of the imaging apparatus in the present example, andis an equivalent circuit diagram illustrating the first pixel of the imaging apparatus in the present example. The difference between the present example and the examples described unit above is that the first signal holding unit MEMis shared between the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B of the same pixel. The portions that have the same functions as those in the previously described examples are denoted with the same reference numerals, and thus their descriptions are omitted here.

1 1 1 1 The basic operation will be described here. First, the equivalent circuit diagram includes a first charge transfer unit TX_A to transfer signal charges for generating focal point detection signals at the first photoelectric conversion unit PD_A. Further, a first charge transfer unit TX_B is included to transfer signal charges for generating focal point detection signals at the second photoelectric conversion unit PD_B. Also, the first charge transfer unit TX_A and the first charge transfer unit TX_B both receive an independent control pulse, and so this enables a configuration that may operate independently. In contrast, the OFD control unit OFD_A that drains electrons from the first photoelectric conversion unit PD_A and the OFD control unit OFD B that drains electrons from the second photoelectric conversion unit PD_B may operate by a shared control pulse.

Such a configuration enables signals based on the signal charges for focal point detection generated at the first photoelectric conversion unit PD_A and the signals based on the signal charges for focal point detection generated at the second photoelectric conversion unit PD_B to be read out independently on the vertical signal lines.

26 FIG. is a diagram illustrating an example of driving pulses for the imaging apparatus in the present example. All driving pulses are at a high level and in an electroconductive state.

1 26 FIG. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 1 2 2 1 1 2 2 26 FIG. At the timing T, the φTX_A, φTX_B, φTX, and φOFD of all pixels on the imaging face change from a low level to a high level. Next, at a timing T, the φTX_A, φTX_B, φTX, and φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the charges in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, and the first signal holding unit MEM to be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 1 1 1 4 At a timing T, the φTX_A of all pixels in the first row, the φTX_B of all pixels in the second row, and the φTX_A of all pixels in the third row change from a low level to a high level, and at a timing T, these pulses change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals in the first photoelectric conversion unit PD_A for the pixels in the first and third row to be transferred to the first signal holding unit MEM. Similarly, the signal charges for generating focal point detection signals in the second photoelectric conversion unit PD_B for the pixels in the second row are transferred to the first signal holding unit MEM.

5 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and electrons generated by light illuminated on the photoelectric conversion units PD_A and PD_B are drained to the OFD region.

6 1 1 Next, at a timing T, a φSEL_changes from a low level to a high level, and at the same time, a φRES_changes from a high level to a low level. Such an operation enables pixel noise signals from the pixels in the first row to be output to the vertical signal line VOUT.

7 8 At a timing T, a PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals from the first row of pixels to be held in the noise signal holding units in the column circuit.

9 2 1 10 2 1 At a timing T, a φTX_changes from a low level to a high level, and at a timing T, the φTX_change from a high level to a low level. Such an operation enables electrons from the multiple pixels in the first row to be transferred from the first signal holding unit MEM to the input node of the amplification transistor SF.

11 12 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signals for generating focal point detection signals generated at the first photoelectric conversion unit PD_A from the pixels in the first row to be held in the optical signal holding units in the column circuit.

13 18 1 3 Next, at timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period).

19 1 1 At a timing T, a φSELof the pixels of the first row changes from a high level to a low level, and a φRESchanges from a low level to a high level. Such an operation enables the pixels in the first row to change to a non-selectable state, and the FD and the gate potential of the amplification transistor SF are reset by the reset transistor.

20 1 21 33 At a timing T, a φSELchanges from a high level to a low level, and the pixels in the first row change from a selectable state to a non-selectable state. In continuance, at timings Tthrough T, the signals from the pixels in the second row are read out. There is a difference here from the first row. Signals from the pixels based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A in the first row are output to the vertical signal lines. In contrast, signals based on the signal charges for generating focal point detection signals generated at the second photoelectric conversion unit PD_B from the pixels in the second row are output.

34 Next, at timings from T, the signals from the pixels in the third row are read out. Similarly to those of the first row, the signals based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A from the pixels in the third row are output.

In other words, signals based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A from odd-numbered rows are output. Signals based on the signal charges for generating focal point detection signals generated at the second photoelectric conversion unit PD_B from even-numbered rows are then output. Of course this may be changed to even-odd rows, or may be changed randomly per pixel row.

Such an operation enables signals based on the signal charges for generating focal point detection signals from the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B in the same exposure period to be obtained independently from adjacent pixels.

35 Regarding the present example, the exposure period of the next frame begins during the read out period of the pixels in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals generated from light illuminated on the photoelectric conversion units PD_A and PD_B to be accumulated in the photoelectric conversion units PD_A and PD_B.

3 4 1 2 26 FIG. Also, if signals from the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B of the same pixel are added, during the period for timings Tthrough T, the φTX_A and φTX_B of all pixels on the imaging face may be changed to a high level simultaneously. Operation may be enabled with the imaging apparatus to switch between a mode that performs addition of the signals from the multiple photoelectric conversion units of the same pixel, and the driving pattern illustrated in.

27 FIG. 28 FIG. is a top view of the imaging apparatus in the present example, andis an equivalent circuit diagram illustrating the first pixel of the imaging apparatus in the present example. The portions that have the same functions as those in the previously described examples are denoted with the same reference numerals, and thus their descriptions are omitted here.

28 FIG. The difference between the present example and the examples described up to this point is that each pixel includes multiple signal holding units, and the signals generated at each photoelectric conversion unit are transferred consecutively from the multiple signal holding units to the input node of the amplification transistor. This is specifically described in the circuit diagram in.

1 1 1 1 1 2 1 1 Each pixel includes a first charge transfer unit TX_A to transfer electrons from the first photoelectric conversion unit PD_A and a first charge transfer unit TX_B to transfer electrons from the second photoelectric conversion unit PD_B. Also, an output node_of both the first charge transfer unit TX_A and TX_B is electrically connected to an input node_of the first signal holding unit MEM. The first signal holding unit MEMincludes a node which also has a predetermined voltage applied. The predetermined voltage may be the ground voltage, for example.

2 1 2 2 3 2 The second charge transfer unit TXtransfers signal charges for generating focal point detection signals held at the first signal holding unit MEMto a second signal holding unit MEM. Here the output node of the second charge transfer unit TXis electrically connected to an input node_of the second signal holding unit MEM.

3 2 A third charge transfer unit TXtransfers signal charges for generating focal point detection signals held at the second signal holding unit MEMto the FD. Also, the FD is electrically connected to the gate of the amplification transistor SF. The selection transistor SEL is disposed electrically between the output node of the amplification transistor SF and the vertical signal line VOUT. Further, a predetermined voltage is supplied to the input node of the amplification transistor, and the reset transistor RES is disposed to performs resets.

29 FIG.A 27 FIG. is a cross-sectional diagram illustrating the first pixel in the present example. The cross section from the first photoelectric conversion unit PD_A and the cross section from the second photoelectric conversion unit PD_B is the same, and so the following description uses the first photoelectric conversion unit PD_A as the example.is a cross-sectional diagram illustrating the portions corresponding to the dotted line.

2901 2900 2902 2901 2903 2902 2901 2902 2903 A P-type semiconductor regionis disposed in an N-type semiconductor region. An N-type semiconductor regionis disposed to configure a PN junction with the P-type semiconductor region. A P-type semiconductor regionis disposed on the surface side of the N-type semiconductor region. A so-called embedded type of photodiode is configured by the P-type semiconductor region, the N-type semiconductor region, and the P-type semiconductor region.

2904 2905 1 2905 2906 2907 2 2907 2908 2909 2910 2914 The signal charges for generating focal point detection signals generated at the photoelectric conversion unit PD_A are transferred to a first channel, and reach an N-type semiconductor regionwhich configures the first signal holding unit MEM. The signal charges for generating focal point detection signals held at the N-type semiconductor regionare transferred to a second channel, and reach an N-type semiconductor regionwhich configures the second signal holding unit MEM. The signal charges for generating focal point detection signals held at the N-type semiconductor regionare transferred to a third channel, and reach an N-type semiconductor regionwhich configures the FD region. Also, the signal charges for generating focal point detection signals generated at the photoelectric conversion unit PD_A may be drained an N-type semiconductor regionwhich configures the OFD region via a fourth transfer gate.

2911 2904 2905 2911 1 1 A first control electrodeis disposed with the first channeland in the upper portion of the N-type semiconductor regionvia an insulating layer. The first control electrodehas dual functions as the first charge transfer unit TXand the first signal holding unit MEM.

1 2911 2904 2904 The first charge transfer unit TXis configured with the inclusion of a portion of a first control electrode, which is disposed with a first channeland via an insulating layer on the first channel.

1 2905 2901 2905 1 2911 2905 The first signal holding unit MEMincludes the N-type semiconductor region (the first semiconductor region), and the P-type semiconductor region (the second semiconductor region)which configures the PN junction with the N-type semiconductor region. Further, the first signal holding unit MEMis configured with the inclusion of a portion of the first control electrodewhich is disposed on the N-type semiconductor regionvia an insulating layer.

2912 2906 2907 2912 2 2 A second control electrodeis disposed above the second channeland the N-type semiconductor regionvia an insulating layer. The second control electrodehas dual functions as the second charge transfer unit TXand the second signal holding unit MEM.

2 2912 2906 2906 The second charge transfer unit TXis configured with the inclusion of a portion of the second control electrodewhich is disposed with the second channeland on the second channelvia an insulating layer.

2 2907 2901 2907 2 2912 2907 The second signal holding unit MEMincludes the N-type semiconductor region, and the P-type semiconductor regionwhich configures the PN junction with the N-type semiconductor region. Further, the second signal holding unit MEMis configured with the inclusion of a portion of the second control electrodewhich is disposed on the N-type semiconductor regionvia an insulating layer.

2913 2908 3 2908 2913 A third control electrodeis disposed on the third channelvia an insulating layer. This is configured with the inclusion of the third charge transfer unit TX, the third channel, and the third control electrode.

29 FIG.B 29 FIG.A is a diagram illustrating the potential of the cross section corresponding to. Each control electrode is in a non-electroconductive state, a pulse is supplied. That is to say, the electron potential barrier is in a high state.

1 2 1 1 2 1 2 2904 2906 2911 2912 Such a potential state exists during the period when signals are held in the photoelectric conversion unit PD, the first signal holding unit MEM, and the second signal holding unit MEM. The amount of signal charges that may be held in the first signal holding unit MEMis determined by the height of the potential generated by the first charge transfer unit TXand the height of the potential generated by the second charge transfer unit TX. Here, the height of the potential generated by the first charge transfer unit TXand the height of the potential generated by the second charge transfer unit TXis nearly the same. Such a state may be implemented by equalizing the concentration of impurities in the first channeland the concentration of impurities in the second channel, and by equalizing the amplitude of control pulses supplied to the first control electrodeand the second control electrode.

30 30 FIGS.A andB 30 30 FIGS.A andB 30 FIG.A 30 FIG.B 30 30 FIGS.A andB 1 38 39 are diagrams illustrating an example of the control pulses for the imaging region of the imaging apparatus in the present example. All control pulses are at a high level and in an electroconductive state.combine to form one diagram of the driving pulses where timings Tthrough Tare illustrated inand timings from Tare illustrated in. Further, the pulse PTS is a control pulse used to hold signals in the photoelectric conversion unit disposed in the column circuit. The pulse PTN is a control pulse used to hold signals in the noise signal holding unit disposed in the column circuit. The pulse PHSEL is a control pulse output from the horizontal scanning circuit, and controls the read out of each row of signals held in the column circuit to the horizontal signal lines. The driving pulses inmay be used in a still image mode.

1 30 FIG.A Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 1 2 3 2 1 1 2 3 1 2 30 FIG.A At the timing T, the φTX_A, φTX_B, φTX, φTX, and φOFD of all pixels on the imaging face change from a low level to a high level. Next, at a timing T, the φTX_A, φTX_B, φTX, φTX, and φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the charges in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, and the first signal holding unit MEMto be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 1 4 1 1 At a timing T, the φTX_A of all pixels in the first row on the imaging face change from a low level to a high level, and at a timing T, the φTX_A of all pixels in the first row on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals in the first photoelectric conversion unit PD_A for all pixels on the imaging face to be transferred to the first signal holding unit MEM.

5 2 6 2 1 2 2 At a timing T, the φTXof all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTXof all pixels on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals held in the first signal holding unit MEMto be transferred to the second signal holding unit MEMvia the second charge transfer unit TX.

7 1 8 1 1 At a timing T, the φTX_B for all pixels on the imaging face changes from a low level to a high level, and at a timing T, the φTX_B for all pixels on the imaging face changes from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals in the second photoelectric conversion unit PD_B for all pixels on the imaging face to be transferred to the first signal holding unit MEM.

9 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and the electrons generated from light illuminated on the photoelectric conversion units PD_A and PD_B are drained to the OFD region.

10 1 1 At a timing T, a φSEL_changes from a low level to a high level, and at the same time, a φRES_changes from a high level to a low level. Such an operation enables the noise signals of pixels in the first row to be output to the vertical signal line VOUT.

11 12 At a timing T, the PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals from the pixels in the first row to be held in the noise signal holding unit in the column circuit.

13 3 14 3 2 Next, at a timing T, a φTXchanges from a low level to a high level, and at a timing T, the φTXchanges from a high level to a low level. Such an operation enables signal charges for generating focal point detection signals for all pixels in the first row to be transferred from the second signal holding unit MEMto the input node of the amplification transistor SF.

15 16 At a timing T, a PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables optical signals based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A of pixels in the first row to be held in the optical signal holding unit in the column circuit.

17 22 1 3 At timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period). Such an operation enables signals based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A of pixels in the first row to be read out to a device external to the imaging apparatus.

23 1 1 2 1 24 1 1 2 1 2 At a timing T, a φSELchanges from a high level to a low level, and a φRESchanges from a low level to a high level. Also, a φTX_changes from a low level to a high level. In continuance, at a timing T, the φSELchanges from a low level to a high level, and the φRESchanges from high level to a low level. Also, the φTX_changes from a high level to a low level. Such an operation enables the signals based on the signal charges for generating focal point detection signals generated by the second photoelectric conversion unit PD_B of the pixels in the first row to be held in the second signal holding unit MEM.

25 26 At a timing T, the PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals from the pixels in the first row to be held in the noise signal holding units in the column circuit.

27 3 28 3 2 At a timing T, a φTXchanges from a low level to a high level, and at a timing T, the φTXchanges from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals from the multiple pixels in the first row to be transferred from the second signal holding unit MEMto the input node of the amplification transistor SF.

29 30 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signals based on the signal charges for generating focal point detection signals generated by the second photoelectric conversion unit PD_B of the pixels in the first row to be held in the optical signal holding unit in the circuit row.

31 36 1 3 At timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period). Such an operation enables signals based on the signal charges for generating focal point detection signals generated at the second photoelectric conversion unit PD_B of pixels in the first row to be read out to a device external to the imaging apparatus.

37 1 38 64 At a timing T, the φSELchanges from a high level to a low level. The pixels in the first row change from a selectable state to a non-selectable state. In continuance, at timings Tthrough T, the signals from the pixels in the second row are read out.

65 Next, at timings from T, the signals from the pixels in the third row are read out. Similarly to those of the first row, the signals based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A from the pixels in the third row are output.

66 Regarding the present example, the exposure period of the next frame begins during the read out period of the pixels in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals generated from light illuminated on the photoelectric conversion units PD_A and PD_B to be accumulated in the photoelectric conversion units PD_A and PD_B.

31 FIG. 2 illustrates an equivalent circuit diagram of the present example. The difference between the present example and the examples previously described is that the circuit configuration downstream of the second signal holding unit MEMincludes multiple circuit blocks in parallel, and each of these includes multiple vertical signal lines corresponding to each circuit block. The portions that have the same functions as those in the previously described examples are denoted with the same reference numerals, and thus their descriptions are omitted here.

2 3 3 3 3 The present example includes multiple third charge transfer units downstream of the second signal holding unit MEM. Also, the amplification transistor, the reset transistor, and the selection transistor are disposed in each of the third charge transfer units. The configuration enables control pulses to be supplied independently to enable independent operation of third charge transfer units TX_A and TX_B. As previously described, by provisioning multiple vertical signal lines for example, operation may be controlled with a shared control pulse to circuit elements which have the same function as that of the circuits downstream of the third charge transfer units TX_A and TX_B. According to the present example, the speed of read out of signals may be further improved as compared with the sixth Example or other examples.

32 FIG. 32 FIG. is a diagram illustrating an example of the control pulses in the present example. All control pulses are at a high level and in an electroconductive state. Further, the pulse PTS is a control pulse used to hold signals in the photoelectric conversion unit disposed in the column circuit. The pulse PTN is a control pulse used to hold signals in the noise signal holding unit disposed in the column circuit. The pulse PHSEL is a control pulse output from the horizontal scanning circuit, and controls the read out of each row of signals held in the column circuit to the horizontal signal lines. The driving pulses inmay, for example, be used in a focal point detecting mode.

1 32 FIG. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 1 2 3 3 2 1 1 2 3 3 1 2 2 32 FIG. At the timing T, the φTX_A, φTX_B, φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a low level to a high level. Next, at a timing T, the φTX_A, φTX_B, φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the charges in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, the first signal holding unit MEM, and the second signal holding unit MEMto be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 1 4 1 1 At a timing T, the φTX_A of all pixels in the first row on the imaging face change from a low level to a high level, and at a timing T, the φTX_A of all pixels in the first row on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals in the first photoelectric conversion unit PD_A for all pixels on the imaging face to be transferred to the first signal holding unit MEM.

5 2 6 2 1 2 2 At a timing T, the φTXof all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTXof all pixels on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals held in the first signal holding unit MEMto be transferred to the second signal holding unit MEMvia the second charge transfer unit TX.

7 1 8 1 1 At a timing T, the φTX_B for all pixels on the imaging face changes from a low level to a high level, and at a timing T, the φTX_B for all pixels on the imaging face changes from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals in the second photoelectric conversion unit PD_B for all pixels on the imaging face to be transferred to the first signal holding MEM.

9 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and the charges generated from light illuminated on the photoelectric conversion units PD_A and PD_B are drained to the OFD region.

10 1 1 At a timing T, a φSEL_changes from a low level to a high level, and at the same time, a φRES_changes from a high level to a low level. Such an operation enables a state in which the noise signals of pixels in the first row to be output to the vertical signal lines VOUT_A and VOUT_B.

11 12 At a timing T, the PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals from the pixels in the first row to be held in the noise signal holding unit in the column circuit.

13 3 14 3 2 At a timing T, a φTXchanges from a low level to a high level, and at a timing T, the φTXchanges from a high level to a low level. Such an operation enables signal charges for generating focal point detection signals for multiple pixels in the first row to be transferred from the second signal holding unit MEMto the input node of the amplification transistor SF.

15 2 16 2 1 2 At a timing T, the φTXof all pixels on the imaging face changes from a low level to a high level, and at a timing T, the φTXof all pixels on the imaging face changes from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals generated at the second photoelectric conversion unit PD_B to be transferred from the first signal holding unit MEMto the second signal holding unit MEM.

17 3 2 At a timing T, the PTS changes from a low level to a high level. Further, a φTX_B of all pixels on the imaging face change from a low level to a high level. Such an operation enables the signal charges for generating focal point detection signals generated at the second photoelectric conversion unit PD_B to be transferred from the second signal holding unit MEMto the input node of the amplification transistor.

18 3 At a timing T, the φTX_B for all pixels on the imaging face change from a high level to a low level.

19 17 19 At a timing T, the PTS changes from a high level to a low level. During the period for timings Tthrough T, the optical signals based on signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B of pixels in the first row are held in the photoelectric conversion unit in the column circuit.

20 25 1 3 At timings Tthrough T, PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period). Such an operation enables signals based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B of pixels in the first row to be read out to a device external to the imaging apparatus.

26 1 1 27 44 45 At a timing T, a φSELchanges from a high level to a low level, and a φRESchanges from a low level to a high level. The pixels in the first row change from a selectable state to a non-selectable state. In continuance, during the period for timings Tthrough T, the signals for pixels in the second row are read out. Also, at timings from T, the signals for pixels in the third row are read out.

45 Regarding the present example, the exposure period of the next frame begins during the read out period of the pixels in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the electrons generated from light illuminated on the photoelectric conversion units PD_A and PD_B to be accumulated in the photoelectric conversion units PD_A and PD_B.

33 FIG. 34 FIG. is a top view of the imaging apparatus in the present example. Also,is a diagram illustrating an equivalent circuit diagram of the first pixel of the imaging device in the present example. The difference between the present example and the examples previously described is a circuit element that is disposed from the first photoelectric conversion unit PD_A to the input node of the amplification transistor, and a circuit element that is disposed from the second photoelectric conversion unit PD_B to the input node of the amplification transistor. The first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B does not have to have the same signal processing, and may be desirable to have different processing depending on the situation. This would apply, for example, if the sensitivity of the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B are different. Also, if the sensitivity of the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B are not different, there are cases where different circuits are desirable due to restrictions on the driving sequence or the like.

34 FIG. 1 2 With reference to, the configuration related to the first photoelectric conversion unit PD_A has the first signal holding unit MEMdisposed electrically between the output node of the first photoelectric conversion unit PD_A and the input node of the amplification transistor SF. In contrast, as an independent configuration that does not have a signal holding unit provisioned, only the second charge transfer unit TX_B is disposed electrically between the output node of the second photoelectric conversion unit PD_B and the input node of the amplification transistor SF.

35 36 FIGS.and 34 FIG. 35 FIG. 36 FIG. are diagrams illustrating specific driving pulses for the imaging apparatus illustrated in. The mode illustrated inis preferably used in a still image photography or similar mode. The mode illustrated inis preferably used as a mode for focal point detection signals. Either set of control pulses are at a high level and in an electroconductive state. Further, the pulse PTS is a control pulse used to hold signals in the optical signal holding unit disposed in the column circuit. The pulse PTN is a control pulsed used to hold signals in the noise signal holding unit disposed in the column circuit. The pulse PHSEL is a control pulse output from the horizontal scanning circuit, and controls the read out of each row of signals held in the column circuit to the horizontal signal lines.

35 FIG. 35 FIG. 1 First,will be described. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 2 2 2 1 2 2 1 2 35 FIG. At the timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a low level to a high level. Next, at a timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the charges in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, and the first signal holding unit MEMto be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 1 4 1 1 At a timing T, the φTXof all pixels in the first row on the imaging face change from a low level to a high level, and at a timing T, the φTX_A of all pixels in the first row on the imaging face change from a high level to a low level. Such an operation enables the signal charges for generating focal point detection signals in the first photoelectric conversion unit PD_A for all pixels on the imaging face to be transferred to the first signal holding MEM.

5 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and the signal charges for generating focal point detection signals generated by light illuminated on the photoelectric conversion units PD_A and PD_B are drained to the OFD region.

6 1 1 At a timing T, the φSEL_changes from a low level to a high level, and at the same time, the φRES_changes from a high level to a low level. Such an operation enables a state in which the noise signals of pixels in the first row may be output to the vertical signal lines VOUT_A and VOUT_B.

7 8 At a timing T, the PTN changes from a low level to a high level, and at a timing T, the PTN changes from a high level to a low level. Such an operation enables the noise signals from the pixels in the first row to be held in the noise signal holding unit in the column circuit.

9 2 2 10 2 2 1 At a timing T, the φTX_A and φTX_B of all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTX_A and φTX_B change from a high level to a low level. Such an operation enables signal charges for generating focal point detection signals generated by the first photoelectric conversion unit PD_A and the signal charges for generating focal point detection signals generated by the second photoelectric conversion unit PD_B, both of which are in multiple pixels in the first row, to be added at the gate of the amplification transistor SF. In other words, the signal charges for generating focal point detection signals generated by the first photoelectric conversion unit PD_A held at the first signal holding unit MEMand the signal charges for generating focal point detection signals generated by the second photoelectric conversion unit PD_B are added at the gate of the amplification transistor SF.

11 12 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signals obtained by adding the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B, both of which are in the pixels in the first row, to be held in the optical signal holding unit in the column circuit.

13 18 1 3 At timings Tthrough T, the PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period). Such an operation enables signals obtained by adding the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B, both of which are in pixels in the first row, to be read out to a device external to the imaging apparatus.

19 1 1 20 33 34 At a timing T, the φSELchanges from a high level to a low level, and the φRESchanges from a low level to a high level. The pixels in the first row change from a selectable state to a non-selectable state. In continuance, during the period for timings Tthrough T, the signals of pixels in the second row are read out. Also, at timings from T, the signals of pixels in the third row are read out.

34 Regarding the present example, the exposure period of the next frame begins during the read out period of the pixels in the third row. At a timing T, the φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the signals charges for generating focal point detection signals generated from light illuminated on the photoelectric conversion units PD_A and PD_B to be accumulated in the photoelectric conversion units PD_A and PD_B.

36 FIG. 36 FIG. 1 Next,will be described. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 2 2 2 1 2 2 1 2 36 FIG. At the timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a low level to a high level. Next, at a timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the charges in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, and the first signal holding unit MEMto be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 At a timing T, the φRES of all pixels on the imaging face change from a high level to a low level.

4 1 2 5 1 2 1 At a timing T, the φTXand φTX_B of all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTXand φTX_B of all pixels on the imaging face change from a high level to a low level. Such an operation enables signal charges for generating focal point detection signals of the first photoelectric conversion unit PD_A in all pixels on the imaging face to be transferred to the first signal holding unit MEM. Further, signal charges for generating focal point detection signals of the second photoelectric conversion unit PD_B are transferred to the input node of the amplification transistor SF.

6 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and the signal charges generated by the illumination of light on the photoelectric conversion units PD_A and PD_B are drained to the OFD region.

7 1 At a timing T, the φSEL_changes from a low level to a high level. Such an operation enables a state in which the signals based on the signal charges for generating focal point detection signals generated by the second photoelectric conversion unit PD_B in pixels in the first row may be read out to the vertical signal line VOUT.

8 9 At a timing T, the PTS changes from a low level to a high level, and at a timing T, the PTS changes from a high level to a low level. Such an operation enables the optical signals based on the signal charges for generating focal point detection signals generated by the second photoelectric conversion unit PD_B in the pixels in the first row to be held in the optical signal holding unit in the column circuit.

10 15 1 3 At timings Tthrough T, the PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period). Such an operation enables signals based on the signal charges for generating focal point detection signals generated at the second photoelectric conversion unit PD_B in pixels in the first row to be read out to a device external to the imaging apparatus.

16 1 1 17 1 1 At a timing T, the φSELtemporarily changes from a high level to a low level, and the φREStemporarily changes from a low level to a high level. At a timing T, the φSELchanges from a low level to a high level, and the φREStemporarily changes from a high level to a low level.

18 19 At a timing T, a CTN changes from a low level to a high level, and at a timing T, the CTN changes from a high level to a low level.

20 2 21 2 At a timing T, the φTX_A of all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTX_A of all pixels on the imaging face change from a high level to a low level.

22 23 At a timing T, the CTS changes from a low level to a high level, and at a timing T, the CTS changes from a high level to a low level.

4 29 1 3 At timings Tthrough T, the PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period). Such an operation enables signals based on the signal charges for generating focal point detection signals generated at the first photoelectric conversion unit PD_B in pixels in the first row to be read out to a device external to the imaging apparatus.

30 1 1 At a timing T, the φSELchanges from a high level to a low level, and the φRESchanges from a low level to a high level. Such an operation enables the pixels in the first row to change from a selectable state to a non-selectable state.

32 58 59 At timings Tthrough T, the signals of the pixels in the second row are read out in the same way. Also, at timings from T, the signals of the pixels in the third row are read out. Regarding the present example, the optical signals and the noise signals from the first photoelectric conversion unit PD_A are output, and only the optical signals from the second photoelectric conversion unit PD_B are output.

37 FIG. is a diagram illustrating an equivalent circuit diagram of the first pixel in the present example. The difference between the present example and the eighth Example is the provisioning of independent pixel transistors such as the amplification transistors corresponding to both the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B. The portions that have the same functions as those in the previously described examples are denoted with the same reference numerals, and thus their descriptions are omitted here.

38 FIG. is a diagram illustrating an example of the control pulses supplied to the imaging region of the imaging apparatus in the present example. All control pulses are at a high level and in an electroconductive state. Further, the pulses PTS_A and PTS_B are control pulses used to hold signals in the optical signal holding unit disposed in the column circuit. The pulses PTN_A and PTN_B are control pulses used to hold signals in the noise signal holding unit disposed in the column circuit. The configuration of the present example has to enable independent control of the first photoelectric conversion unit PD_A and the second photoelectric conversion unit PD_B via a sample hold circuit such as a column circuit or similar.

The pulse PHSEL is a control pulse output from the horizontal scanning circuit, and controls the read out of each row of signals held in the column circuit to the horizontal signal lines.

1 38 FIG. Until a timing T, the φRES of all pixels on the imaging face are at a high level, and the reference voltage has been supplied to the gate of the amplification transistor. Other control pulses illustrated inare at a low level.

1 1 2 2 2 1 2 2 1 2 38 FIG. At the timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a low level to a high level. Next, at a timing T, the φTX, φTX_A, φTX_B, and φOFD of all pixels on the imaging face change from a high level to a low level. Such an operation enables the charges in the first photoelectric conversion unit PD_A, the second photoelectric conversion unit PD_B, and the first signal holding unit MEMto be drained to the reset transistor drain via the OFD region or the FD region. Also at the timing T, the imaging exposure period of the nth frame begins. As illustrated in, the exposure period is the same for the entire imaging face.

3 At a timing T, the φRES_B of all pixels on the imaging face change from a high level to a low level.

4 1 2 5 1 2 1 At a timing T, the φTXand φTX_B of all pixels on the imaging face change from a low level to a high level, and at a timing T, the φTXand φTX_B of all pixels on the imaging face change from a high level to a low level. Such an operation enables signal charges for generating focal point detection signals of the first photoelectric conversion unit PD_A of all pixels on the imaging face in all pixels in the first row to be transferred to the first signal holding unit MEM. Further, signal charges for generating focal point detection signals of the second photoelectric conversion unit PD_B are transferred to the input node of the amplification transistor SF_B.

6 At a timing T, the φOFD of all pixels on the imaging face change from a low level to a high level, and the signal charges generated by the illumination of light on the photoelectric conversion units PD_A and PD_B are drained to the OFD region.

7 1 At a timing T, the φSEL_changes from a low level to a high level. Such an operation enables a state in which the signals of pixels in the first row may be read out to the vertical signal lines VOUT_A and VOUT_B. Further, the φRES_A of all pixels on the imaging face change from a high level to a low level.

8 9 At a timing T, the PTS_A and PTS_B change from a low level to a high level, and at a timing T, the PTN_A and PTS_B change from a high level to a low level. Such an operation enables the noise signals generated on the electrical pathway of the first photoelectric conversion unit PD_A in the first row to be held in the noise signal holding unit in the column circuit. Further, the optical signals based on the signal charges for generating focal point detection signals generated by the second photoelectric conversion unit PD_B of pixels in the first row to be held in the optical signal holding unit in the column circuit.

10 1 2 1 1 11 1 2 1 At a timing T, the φRES_B_and φTX_A_change from a low level to a high level. Such an operation enables the reference voltage to be supplied to the voltage of the input node of the amplification transistor SF_B. Further, the signals held in the first signal holding unit MEMof pixels in the first row are transferred to the input node of the amplification transistor SF_A. Then, at a timing T, the φRES_B_and φTX_A_change from a high level to a low level.

12 13 At a timing T, the PTS_A and PTN_B change from a low level to a high level, and at a timing T, the PTS_A and PTN_B change from a high level to a low level. Such an operation enables the noise signals generated on the electrical pathway of the second photoelectric conversion unit PD_A in the first row to be held in the noise signal holding unit in the column circuit. Further, the optical signals based on the signal charges for generating focal point detection signals generated by the first photoelectric conversion unit PD_B of pixels in the first row to be held in the optical signal holding unit in the column circuit.

14 19 1 3 At timings Tthrough T, the PHSEL_through PHSEL_are consecutively changed to an electroconductive state, which enables signals of each pixel row to be consecutively output to the horizontal output lines. This period is called the horizontal scanning period (horizontally enabled period). Such an operation enables the optical signal and the noise signals of pixels in the first row to be read out to a device external to the imaging apparatus.

20 1 1 1 At a timing T, the φSELchanges from a high level to a low level, and the φRES_A_and φRES_B_change from a low level to a high level. Such an operation enables the first row to change from a selectable state to a non-selectable state.

20 From a timing Ton, the signals of the pixels in the second row are read out in the same way.

Focal Point Detection Mechanism

The focal point detection regarding the imaging face of the imaging apparatus in the previously described examples will be described here. Specifically, one example of the phase contrast detection will be described where the focal point detection is performed during imaging on the imaging face.

39 40 FIGS.and 39 FIG. 39 FIG. 3900 3901 1 2 3902 3902 3903 3901 3903 3904 3906 3907 3905 3902 3908 3909 3903 3902 1 2 1 2 This will be described with reference to.is a conceptual diagram illustrating light beams from an exit pupil of an photography lensilluminated on an imaging apparatus. ML represents a microlens, CF represents a color filter, and the photoelectric conversion unit PDand PDrepresent multiple photoelectric conversion units on which light condensed from one microlens is illuminated. Reference numeraldenotes the exit pupil of the photography lens. Here, one pixel includes one microlens ML, and the focus of light beams condensed from the exit pupilis represented by an optical axis. Light emitted from the exit pupil is input to the imaging apparatus, primarily on the optical axis. Light beams on the outer rings of light that pass through a partial regionof the exit pupil are denoted withand. Light beams on the outer rings of light that passes through a partial regionof the exit pupilare denoted byand. As can be inferred from, with the optical axisas a boundary, the upper portion of the light beam that leaves from the exit pupilis illuminated onto the PD, and the lower portion of the light beam is illuminated onto the PD. That is to say, the PDand the PDeach receive light from different regions of the exit pupil of the photography lens.

This property is used to perform the detection of phase contrasts. When looking at the imaging region from the top surface in regard to the region within the pixel, the light condensed by the single microlens is illuminated onto multiple photoelectric conversion units, and so the data obtained from one PD is represented as the first line, and the data obtained from the other PD is represented as the second line. Thus, the obtaining of the correlation data between the two lines enables the detection of phases.

39 FIG. 40 40 FIGS.A andB 40 FIG.A 40 FIG.B 1 2 1001 Regarding, let us say for example the light condensed by the single microlens is illuminated onto multiple photoelectric conversion units, and so the data obtained from the PD disposed in the lower region is represented as the first line, and the data obtained from the PD disposed in the upper region is represented as the second line. In this case, PDoutputs one pixel worth of the data from the first line, and the PDoutputs one pixel worth of the data from the second line.illustrate the line data at a time when a point light source forms an image.illustrates data of the first line and second line when in focus. The horizontal axis represents the pixel position, and the vertical axis represents the output. The first line and the second line overlap when in focus.illustrates the case when this is out of focus. In this case, the first line and second line have phase difference, and pixel positions are shifted. By calculating a shift amount, how far out of focus the image is from when in focus is determined. Such a method enables an image to be set into focus by detection the phase and driving the lens.

1 2 3901 Next, image data generation from these pixel arrays will be described. As previously described, the focus may be detected by independently reading out signals from the PDand the PDfrom the imaging apparatus, and then performing a calculation to detect the phase contrast. Also, the photographed image may be generated by adding the signals from the PD where light condensed from one microlens has been illuminated.

39 FIG. Althoughdescribes pixels near the center of the imaging device, there is a significant difference in the amount of light actually illuminated between PDs of pixels on the outer right of the imaging device, and for this reason, focal point detection pixels with a higher precision may be disposed in the outer portion than those disposed in the center of the imaging region.

Application to Imaging System

41 FIG. 41 FIG. 4101 4102 4105 4103 4104 illustrates an example of an imaging system that may employ the imaging apparatus of the previously described embodiments. In, a lens unitperforms zoom control, focus control, and aperture control by a lens driving apparatusat lens unit where an imaging apparatusforms the image from the optical image of the object. A shuttercontrols a mechanical shutter by a shutter driving apparatus. A global electron shutter is enabled by using the configuration of the present technology, and so the mechanical shutter does not have to be used; however, it is preferable to have an operation mode that is switchable depending on usage.

4105 4101 4106 4105 4107 4105 4106 4109 4108 4110 4111 4112 Reference numeraldenotes an imaging apparatus for handling the object of the image to be formed by the lens unitas image signals, and reference numeraldenotes an imaging signal processing circuit that performs various corrections on the imaging signals output from the imaging apparatus, compression of the data, and other functions. Reference numeraldenotes a timing generating circuit includes a driving method to output each type of timing signal to the imaging apparatusand the imaging signal processing circuit. Reference numeraldenotes a control circuit that controls each type of calculation and the entire imaging apparatus, reference numeraldenotes a memory that temporarily stores the image data, and reference numeraldenotes an interface that performs the recording to and reading out from a recording medium. Reference numeraldenotes a removable recording medium such as semiconductor memory that performs the recording and the reading out of image data, and reference numeraldenotes a display unit that displays each type of information and the photographed image.

1106 Next, the operation of a digital camera using the previously described configuration during photography will be described. When the main power is turned on, the control system power is turned on, and further the imaging system circuit such as the imaging signal processing circuitis turned on.

4105 4109 4102 Then, when the release button (not illustrated) is pressed, a ranging calculation is performed from the data from the imaging apparatus, a calculation of the distance to the object based on the ranging result is performed at the control circuit. Afterwards, the lens unit is driven by the lens driving apparatus, and then the state of focus is determined, and if the image is determined to still not be in focus, the lens unit is driven again, and to complete the focus operation. Instead of being obtained from data from the imaging apparatus, the ranging calculation may be performed by a dedicated ranging apparatus (not illustrated).

4105 4106 4109 4108 4111 4110 4109 The photography operation then begins after the focus has been confirmed. When the photography operation ends, the image signals output from the imaging apparatusare image processes by the photography signal processing circuit, and written to memory by the control circuit. Sort processing, additive processing, and some selected processing is performed at the photography signal processing circuit. The data accumulated in the memoryis stored in the removable recording mediumsuch as semiconductor memory through the recording medium control interface unitby control from the control circuit.

Also, the images may be input directly to a computer or similar through an external interface (not illustrated) and processed further there.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.